TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 227

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
4.6
Output mode/
input rising mode
(Input falling mode)
Interrupt, Capture
(1)
Note:
(2)
Output data
NMI
Input data
INT0 to INT3 low width
INT0 to INT3 high width
Symbol “X” in the following table means the period of clock “f
clock “f
high-speed oscillator/low-speed oscillator and so on.
(INT4 to INT5 Low Level Pulse Width)
SCLK
SCLK
INT4 to INT5 interrupts
Variable
RXD
8X + 100
TXD
and INT0 to INT3 interrupts
Min
Parameter
SYS
” for CPU core. The period of f
t
INTBL
f
SYS
(fc = 40 MHz)
= 20 MHz
Min
500
Symbol
T
T
INTAL
INTAH
t
OSS
92CM22-225
t
Valid
SCY
0
0
4X + 40
4X + 40
t
OHS
Min
SYS
t
Variable
SRD
(INT4 to INT5 High Level Pulse Width)
Variable
8X + 100
Min
depends on the clock gear setting or changing
Max
t
RDS
Valid
1
1
SYS
t
INTBH
(fc = 40 MHz)
Min
240
240
f
20 MHz
”, it’s same period of the system
(fc = 40 MHz)
SYS
f
SYS
t
HSR
= 20 MHz
Min
500
=
Max
Valid
2
2
32040
32040
(fc = 4 MHz)
Min
125 kHz
f
SYS
Unit
ns
=
Max
TMP92CM22
Valid
3
2007-02-16
3
Unit
ns

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