TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 71

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(0030H)
(0032H)
(0032H)
(0033H)
(0033H)
PCCR
PCCR
PCFC
PCFC
PC
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note: Output latch register is set to 1.
Note 1: Read-modify-write instruction is prohibited for the registers PCCR and PCFC.
Note 2: PC0/TA0IN pins do not have a register changing PORT/FUNCTION. For example, when it is used as an input
Note 3: Can not read the output latch data when PC0, PC1, PC5, and PC6 are output mode.
port, the input signal is inputted to 8-bit timer as the input 0.
7
7
7
0: Port
1: INT3
Data from external
PC6C
PC6F
TB0OUT0
0: Input 1: Output
PC6
6
6
6
0
0
port (Note)
Figure 3.5.21 Register for Port C
R/W
W
W
0: Port
1: INT2
Port C Function Register
Port C Control Register
PC5C
TA3OUT
PC5F
PC5
5
5
5
0
0
Port C Register
92CM22-69
4
4
4
0: Port
1: INT0
port (Note)
0: Input
1: Output
Data from
external
PC3C
PC3F
PC3
R/W
W
W
3
3
3
0
1
<PC1F>
<PC5F>
<PC6F>
<PC1C>
<PC5C>
<PC6C>
0
1
0
1
0
1
2
2
2
INT3, TB0OUT0 setting
INT2, TA3OUT Setting
INT1, TA1OUT setting
Input port
Input port
Input port
INT1
INT2
INT3
0
1: INT1
0
0
0
: Port
Data from external
PC1C
0: Input 1: Output
PC1F
TA1OUT
PC1
1
1
1
0
0
port (Note)
R/W
W
W
Output port
Output port
Output port
TB0OUT0
TA1OUT
TA3OUT
0: Port
1: TA0IN
PC0C
PC0F
TMP92CM22
PC0
1
1
1
0
0
0
0
0
2007-02-16