TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 247

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

SC1MOD0
SC1MOD1
Symbol
BR1ADD
SC1BUF
SC1CR
BR1CR
UART/Serial channel (2/2)
channel 1
channel 1
channel 1
channel 1
channel 1
channel 1
baud rate
K setting
Name Address
register
register
mode 0
register
register
register
mode 1
register
control
control
Serial
buffer
Serial
Serial
Serial
Serial
Serial
(Prohibit
120AH
120BH
120CH
120DH
1208H
1209H
RMW)
Receive
data
bit8
Transmis-
sion data
bit8
Always
write “0”.
IDLE2
Undefined
0: Stop
1: Operate
I2S1
RB7
TB7
RB8
TB8
7
R
0
−
0
0
R/W
0: CTS
1: CTS
BR1ADDE BR1CK1
Parity
(16 − K)/
16 divided
I/O interface
mode
0: Odd
1: Even
0: Disable
1: Enable
0: Half duplex
1: Full duplex
FDPX1
EVEN
disable
enable
CTSE
RB6
TB6
6
0
0
0
0
92CM22-245
R/W
0: Receive
1: Receive
Parity
0: Disable
1: Enable
00: φT0
01: φT2
10: φT8
11: φT32
disable
enable
RB5
RXE
TB5
PE
5
0
0
0
R (Receiving)/W (Transmission)
Wake up
0: Disable
1: Enable
BR1CK0
Overrun
OERR
RB4
TB4
WU
4
0
0
0
R (Clear 0 after reading)
Undefined
R/W
R/W
00: I/O interface mode
01: 7-bit UART mode
10: 8-bit UART mode
11: 9-bit UART mode
1: Error
BR1S3
BR1K3
PERR
Parity
SM1
RB3
TB3
3
0
0
0
0
(divided by N + (16 − K)/16).
Sets frequency divisor “K”
Divided frequency setting
Framing
BR1S2
BR1K2
FERR
SM0
RB2
TB2
2
0
0
0
0
R/W
0: SCLK1↑
1: SCLK1↓
00: Timer TA0REG
01: Baud rate
10: Internal clock f
11: External clock
SCLKS
BR1S1
BR1K1
RB1
TB1
SC1
1
0
0
0
0
generator
(SCLK1 input)
TMP92CM22
R/W
2007-02-16
0:Baud
1:SCLK1
BR1S0
BR1K0
rate
generator
pin input
RB0
SC0
TB0
IOC
0
0
0
0
0
IO