TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 97

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

(2) Page ROM control register (PMEMCR)
OPGE Enable bit.
OPWR [1:0] Specifies the number of waits.
PR [1:0] ROM page size.
Bit symbol
Read/Write
After reset
executed only in block address area 2.
The page ROM control register sets page ROM accessing. ROM page accessing is
0 = No ROM page mode accessing (Default)
1 = ROM page mode accessing
00 = 1 state (n-1-1-1 mode) (n ≥ 2) (Default)
01 = 2 states (n-2-2-2 mode) (n ≥ 3)
10 = 3 states (n-3-3-3 mode) (n ≥ 4)
11 = (Reserved)
Note: Set the number of waits “n” to the control register (BnCSL) in each block address area.
00 = 64 bytes
01 = 32 bytes
10 = 16 bytes (Default)
11 = 8 bytes
7
6
92CM22-95
PMEMCR
5
OPGE
4
0
OPWR1
3
0
OPWR0
R/W
2
0
PR1
1
1
TMP92CM22
2007-02-16
PR0
0
0