FAN3229C Fairchild Semiconductor, FAN3229C Datasheet - Page 20

• Manufacturer Part Number: FAN3229C
• Description: The FAN3226-29 family of dual 2A gate drivers is designed to drive N-channel enhancement-mode MOSFETs in low-side switching applications by providing high peak current pulses during the short switching intervals
• Manufacturer: Fairchild Semiconductor

© 2007 Fairchild Semiconductor Corporation
FAN3226 / FAN3227 / FAN3228 / FAN3229 • Rev. 1.0.6
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components, P
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming 
design (heat sinking and air flow):
T

T
P
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, V
switching frequency, F
P
n is the number of driver channels in use (1 or 2).
Dynamic Pre-drive / Shoot-through Current: A
power
consumption under dynamic operating conditions,
including pin pull-up / pull-down resistors, can be
obtained using the “I
graphs in Typical Performance Characteristics to
determine the current I
under actual operating conditions:
P
T
where:
J
B
JB
J
TOTAL
GATE
DYNAMIC
= P
= driver junction temperature
= (psi) thermal characterization parameter
= board temperature in location defined in Note
= Q
relating temperature rise to total power
dissipation
1 under Thermal Resistance table.
= P
TOTAL
JB
loss
= I
G
GATE
was determined for a similar thermal
DYNAMIC
• V
• 
GS
GATE
+ P
resulting
JB
• F
DYNAMIC
+ T
• V
and P
GS
SW
, with gate charge, Q
DD
DD
B
SW
• n
, is determined by:
• n
(No-Load) vs. Frequency”
DYNAMIC
DYNAMIC
from
:
drawn from V
internal
current
G
(1)
(2)
(3)
(4)
, at
DD
20
In the forward converter with synchronous rectifier
shown
FDMS8660S is a reasonable MOSFET selection. The
gate charge for each SR MOSFET would be 60nC with
V
total power dissipation is:
The
characterization parameter of 
system application, the localized temperature around
the device is a function of the layout and construction of
the PCB along with airflow across the surfaces. To
ensure reliable operation, the maximum junction
temperature of the device must be prevented from
exceeding the maximum rating of 150°C; with 80%
derating, T
Equation 4 determines the board temperature required
to maintain the junction temperature below 120°C:
For comparison, replace the SOIC-8 used in the
previous example with the 3x3mm MLP package with

at a PCB temperature of 118°C, while maintaining the
junction temperature below 120°C. This illustrates that
the physically smaller MLP package with thermal pad
offers a more conductive path to remove the heat from
the driver. Consider tradeoffs between reducing overall
circuit size with junction temperature reduction for
increased reliability.
GS
JB
= 3.5°C/W. The 3x3mm MLP package could operate
= V
P
P
P
T
T
GATE
DYNAMIC
TOTAL
B
B
SOIC-8
= T
= 120°C – 0.46W • 43°C/W = 100°C
DD
in
= 7V. At a switching frequency of 500kHz, the
= 60nC • 7V • 500kHz • 2 = 0.42W
J
= 0.46W
J
- P
the
= 3mA • 7V • 2 = 0.042W
would be limited to 120°C. Rearranging
TOTAL
has
typical
• 
JB
a
application
junction-to-board
JB
= 43°C/W. In a
diagrams,
www.fairchildsemi.com
thermal
(5)
(6)
(7)
(8)
(9)
the