CYWUSB6935

Manufacturer Part NumberCYWUSB6935
DescriptionLr 2.4-ghz Dsss Radio Soc
ManufacturerCypress Semiconductor Corporation.
CYWUSB6935 datasheet
 


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WirelessUSB™ LR 2.4-GHz DSSS Radio SoC
1.0
Features
• 2.4-GHz radio transceiver
• Operates in the unlicensed Industrial, Scientific, and
Medical (ISM) band (2.4 GHz–2.483 GHz)
• –95-dBm receive sensitivity
• Up to 0dBm output power
• Range of up to 50 meters or more
• Data throughput of up to 62.5 kbits/sec
• Highly integrated low cost, minimal number of external
components required
• Dual DSSS reconfigurable baseband correlators
• SPI microcontroller interface (up to 2-MHz data rate)
• 13-MHz input clock operation
• Low standby current < 1 µA
• Integrated 30-bit Manufacturing ID
• Operating voltage from 2.7V to 3.6V
• Operating temperature from –40° to 85°C
• Offered in a small footprint 48 QFN
2.0
Functional Description
The CYWUSB6935 transceiver is a single-chip 2.4-GHz Direct
Sequence Spread Spectrum (DSSS) Gaussian Frequency
Shift Keying (GFSK) baseband modem radio that connects
directly to a microcontroller via a simple serial peripheral
interface.
DIOV A L
DIO
SERDES
IRQ
A
SS
SCK
Digital
MISO
SERDES
MOSI
B
RESET
PD
Figure 3-1. CYWUSB6935 Simplified Block Diagram
Cypress Semiconductor Corporation
Document #: 38-16008 Rev. *D
The CYWUSB6935 is offered in an industrial temperature
range 48-pin QFN and a commercial temperature range
48-pin QFN.
3.0
Applications
• Building/Home Automation
— Climate Control
— Lighting Control
— Smart Appliances
— On-Site Paging Systems
— Alarm and Security
• Industrial Control
— Inventory Management
— Factory Automation
— Data Acquisition
• Automatic Meter Reading (AMR)
• Transportation
— Diagnostics
— Remote Keyless Entry
• Consumer / PC
— Locator Alarms
— Presenter Tools
— Remote Controls
— Toys
GFSK
DSSS
Modulator
Baseband
A
DSSS
Baseband
GFSK
B
Demodulator
Synthesizer
3901 North First Street
San Jose
CYWUSB6935
RFOUT
RFIN
,
CA 95134
408-943-2600
Revised August 3, 2005
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CYWUSB6935 Summary of contents

  • Page 1

    ... Operating temperature from –40° to 85°C • Offered in a small footprint 48 QFN 2.0 Functional Description The CYWUSB6935 transceiver is a single-chip 2.4-GHz Direct Sequence Spread Spectrum (DSSS) Gaussian Frequency Shift Keying (GFSK) baseband modem radio that connects directly to a microcontroller via a simple serial peripheral interface ...

  • Page 2

    ... The radio and baseband are both code- and frequency-agile. Forty-nine spreading codes selected for optimal performance (Gold codes) are supported across 78 1-MHz channels yielding a theoretical spectral capacity of 3822 channels. The CYWUSB6935 supports a range meters or more. 4.1 2.4-GHz Radio The receiver and transmitter are a single-conversion, ...

  • Page 3

    ... The Radio Frequency (RF) circuitry has on-chip decoupling capacitors. The CYWUSB6935 is powered from a 2.7V to 3.6V DC supply. The CYWUSB6935 can be shutdown to a fully static state using the PD pin. Below are the requirements for the crystal to be directly connected to X13IN and X13: • ...

  • Page 4

    ... Figure 5-5. SPI Burst Write Sequence CYWUSB6935 Byte 1+N [7:0] Data ...

  • Page 5

    ... Figure 5-7 . The application MCU samples the DIO and DIOVAL on the rising edge of IRQ. 5.3 Interrupts The CYWUSB6935 features three sets of interrupts: transmit, received, and a wake interrupt. These interrupts all share a single pin (IRQ), but can be independently enabled/disabled. In transmit mode, all receive interrupts are automatically disabled, and in receive mode all transmit interrupts are automatically disabled ...

  • Page 6

    ... Application Examples Figure 6-1 shows a block diagram example of a typical battery powered device using the CYWUSB6935 chip. LDO/ DC2DC + - Battery Vcc PSoC Application 8-bit MCU Hardware Figure 6-1. CYWUSB6935 Battery Powered Device ALAR elessU Document #: 38-16008 Rev. *D ...

  • Page 7

    ... Register Descriptions Table 7-1 displays the list of registers CYWUSB6935 that are addressable through the SPI interface. All registers are read and writable, except where noted. Table 7-1. CYWUSB6935 Register Map Register Name Revision ID REG_ID Control REG_CONTROL Data Rate REG_DATA_RATE Configuration REG_CONFIG SERDES Control ...

  • Page 8

    ... This bit is reserved and should be written with a zero. Document #: 38-16008 Rev. *D REG_ID Figure 7-1. Revision ID Register REG_CONTROL Bypass Internal Auto Internal Internal PA Syn Lock PA Enable Signal Disable Figure 7-2. Control CYWUSB6935 Default: 0x07 1 0 Product ID Default: 0x00 1 0 Reserved Reserved Page [+] Feedback ...

  • Page 9

    ... The following Reg 0x04, bits 2:0 values are not valid: • 001–Not Valid • 010–Not Valid • 011–Not Valid • 111–Not Valid Document #: 38-16008 Rev. *D REG_DATA_RATE Code Width Figure 7-3. Data Rate CYWUSB6935 Default: 0x00 1 0 Data Rate Sample Rate Page [+] Feedback ...

  • Page 10

    ... EOF condition will occur at the first invalid bit after a valid reception. Document #: 38-16008 Rev. *D REG_CONFIG 4 3 Reserved Figure 7-4. Configuration REG_SERDES_CTL 4 3 SERDES Enable Figure 7-5. SERDES Control CYWUSB6935 Default: 0x01 IRQ Pin Select Default: 0x03 EOF Length Page [+] Feedback ...

  • Page 11

    ... A Full A condition occurs when data is transferred from the Channel A Receiver into the Receive SERDES Data A register (Reg 0x09). This could occur when a complete byte is received or when an EOF event occurs whether or not a complete byte has been received. Document #: 38-16008 Rev. *D REG_RX_INT_EN Full B Underflow A Overflow A CYWUSB6935 Default: 0x00 1 0 EOF A Full A Page [+] Feedback ...

  • Page 12

    ... TX Enable and RX Enable (Reg 0x03, bits 7:6). For example, the receive status will read 0 if the IC is not in receive mode. These registers are read-only. Document #: 38-16008 Rev. *D REG_RX_INT_STAT Full B Valid A Flow Violation A [3] CYWUSB6935 Default: 0x00 1 0 EOF A Full A Page [+] Feedback ...

  • Page 13

    ... Data Figure 7-8. Receive SERDES Data A REG_RX_VALID_A 4 3 Valid Figure 7-9. Receive SERDES Valid A REG_RX_DATA_B 4 3 Data Figure 7-10. Receive SERDES Data B REG_RX_VALID_B 4 3 Valid Figure 7-11. Receive SERDES Valid B CYWUSB6935 Default: 0x00 Default: 0x00 Default: 0x00 Default: 0x00 Page ...

  • Page 14

    ... The status bits are affected by the TX Enable and RX Enable (Reg 0x03, bits 7:6). For example, the transmit status will read 0 if the IC is not in transmit mode. These registers are read-only. Document #: 38-16008 Rev. *D REG_TX_INT_EN Underflow Overflow REG_TX_INT_STAT Underflow Overflow [4] CYWUSB6935 Default: 0x00 1 0 Done Empty Default: 0x00 1 0 Done Empty Page [+] Feedback ...

  • Page 15

    ... Document #: 38-16008 Rev. *D REG_TX_DATA 4 3 Data Figure 7-14. Transmit SERDES Data REG_TX_VALID 4 3 Valid Figure 7-15. Transmit SERDES Valid REG_PN_CODE Address 0x17 Address 0x16 Address 0x13 Address 0x12 Figure 7-16. PN Code CYWUSB6935 Default: 0x00 Default: 0x00 Default: 0x1E8B6A3DE0E9B222 Address 0x15 ...

  • Page 16

    ... Figure 7-17. Threshold Low REG_THRESHOLD_H Threshold High Figure 7-18. Threshold High REG_WAKE_EN Reserved Figure 7-19. Wake Enable REG_WAKE_STAT Reserved Figure 7-20. Wake Status CYWUSB6935 Default: 0x08 1 0 Default: 0x38 1 0 Default: 0x00 1 0 Wakeup En- able Default: 0x01 1 0 Wakeup Status Page [+] Feedback ...

  • Page 17

    ... MCU must ensure that this register is modified before transmitting data over the air for the first time. Document #: 38-16008 Rev. *D REG_ANALOG_CTL Reserved Reserved PA Output Enable Figure 7-21. Analog Control REG_CHANNEL Channel Figure 7-22. Channel CYWUSB6935 Default: 0x00 Invert Reset Default: 0x00 1 0 Page [+] Feedback ...

  • Page 18

    ... The RSSI will collect a single value each time the part is put into receive mode via Control register (Reg 0x03, bit 7=1). See Section 4.7 for more details. Document #: 38-16008 Rev. *D REG_RSSI RSSI REG_PA Figure 7-24. PA Bias REG_CRYSTAL_ADJ Crystal Adjust Figure 7-25. Crystal Adjust ll y CYWUSB6935 Default: 0x00 1 0 [6] Default: 0x00 Bias Default: 0x00 1 0 Page [+] Feedback ...

  • Page 19

    ... REG_CARRIER_DETECT Reserved Figure 7-28. Carrier Detect REG_CLOCK_MANUAL Manual Clock Overrides Figure 7-29. Clock Manual REG_CLOCK_ENABLE Manual Clock Enables Figure 7-30. Clock Enable CYWUSB6935 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Default: 0x00 1 0 Page [+] Feedback ...

  • Page 20

    ... The MID Read Enable bit in the Analog Control register (Reg 0x20, bit 5) should only be set when reading the contents of the Manufacturing ID register (Reg 0x3C-0x3F). This register is read-only. Document #: 38-16008 Rev. *D REG_SYN_LOCK_CNT 4 3 Count Figure 7-31. Synthesizer Lock Count REG_MID Address 0x3E Address 0x3D Figure 7-32. Manufacturing ID CYWUSB6935 Default: 0x64 ...

  • Page 21

    ... IRQ . Interrupt and SERDES Bypass Mode DIOCLK. N/A Master-Output-Slave-Input Data . SPI data input pin. Hi-Z Master-Input-Slave-Output Data . SPI data output pin. N/A SPI Input Clock . SPI clock. N/A Slave Select Enable . SPI enable 2.7V to 3.6V Ground = Must be tied to Ground. N/A L Must be tied to Ground. CYWUSB6935 Page [+] Feedback ...

  • Page 22

    ... RFOUT E-PAD BOTTOM SIDE Figure 8-1. CYWUSB6935, 48 QFN – Top View Document #: 38-16008 Rev. *D CYWUSB6935 Top View CYWUSB6935 6 48 QFN CYWUSB6935 X13IN 34 PACTL ...

  • Page 23

    ... 2 < V < HIGH [13] to inputs through a series resistor limiting input current to 1 mA. This can’t be done during power down mode. to inputs through a series resistor limiting input current to 1 mA. CYWUSB6935 [9] [10] [12] Min. Typ. Max. Unit 2.7 3.0 3.6 V – 0.1 ...

  • Page 24

    ... fro Figure 12-1. SPI Timing Diagram t t SCK_LO SC K_HI (BU RST READ) every K_HI data DAT_VAL . CC CYWUSB6935 Min. Typ. Max. Unit 476 ns 238 ns 158 ns 158 [16 ...

  • Page 25

    ... Figure 12-3. DIO Receive Timing Diagram _IR _IR Q _LO data L_H L_S U Figure 12-4. DIO Transmit Timing Diagram CYWUSB6935 Min. Typ. Max. Unit 2.1 µs 2.1 µs 0 µs 0 µs 8 µs 16 µ ...

  • Page 26

    ... C = –67 dBm [21 –67 dBm C = –64 dBm ∆ 5,10 MHz ± 2 ppm seven steps, monotonic PN Code Pattern 10101010 PN Code Pattern 11110000 100-kHz resolution bandwidth, –6 dBc CYWUSB6935 Min. Typ. Max. Unit 2.400 2.483 GHz –3 ) –86 –95 dBm –20 –7 dBm 28– ...

  • Page 27

    ... Conditions V @ 2.7V CC [23] [24] [26] to within ±10 ppm to within ±10 ppm Figure 12-5. Power On Reset/Reset Timing t WAKE t STABLE t WAKE_INT Figure 12-6. Sleep / Wake Timing CYWUSB6935 [27] Min. Typ Max. Unit 2000 µs 1 µs 1300 µs 1 µs 1300 µs 2000 µs 10 µs ...

  • Page 28

    ... BER Sensitivity vs Tem p @ 3.3v -94.0 LR06 0x0ECC7E75 -94.5 LR07 0x17D34AAD -95.0 LR14 0x0DD2E9F8 -95.5 -96.0 -96.5 -97.0 -97 -50 -30 BER Sensitivity vs Vcc @ -45°C -95.0 -95.5 -96.0 -96.5 -97.0 -97.5 -98 2.5 2.7 CYWUSB6935 BER Sensitivity vs Temp GUID: 0x0ECC7E75 3.3 3.7 2 100 Temperature (°C) - Tem perature (°C) LR06 0x0ECC7E75 LR07 0x17D34AAD LR14 0x0DD2E9F8 2.9 3.1 3.3 3.5 3.7 3.9 Vcc Page [+] Feedback ...

  • Page 29

    ... pec Average -0.4 -0.6 -0 -60 -40 -20 0 -0.2 2.6 -0.4 3.3 -0.6 3.7 Spec M in -0.8 Spec Typ -1 Temp Spec -1.2 -1.4 -1.6 -1 -60 -40 -20 CYWUSB6935 LR06 0x0EC C7E75 LR07 0x17D34AAD LR14 0x0DD 2E9F8 2.9 3.1 3.3 3.5 3.7 3.9 Vcc Tx Ch40 Output Power LR18 0x17D34E2D 2.6 3.3 3 100 Temp (degC) Tx Ch0 O utput Power LR21 0xECC7E71 2.6 3.3 3 ...

  • Page 30

    ... Rise time: 1 V/ns V THÉ Equivalent to: VENIN EQUIVALENT V R OUTPUT Package Name Package Type 48 QFN 48 Quad Flat Package No Leads Lead-Free 48 QFN 48 Quad Flat Package No Leads Lead-Free CYWUSB6935 ALL INPUT PULSES 90% 10% Fall time Operating Range Industrial Commercial ...

  • Page 31

    ... Cypress against all charges. 0.08 C 1.00 MAX. 0.05 MAX. 0.80 MAX. 0.20 REF. 6.90 7.10 Y 0.30-0.45 0°-12° C SEATING PLANE SIDE VIEW E-PAD SIZE PADDLE SIZE (X, Y MAX.) 5.1 X 5.1 3.8 X 3.8 CYWUSB6935 X 0.23±0.05 PIN1 ID 0. 0.45 E-PAD 5.45 5.55 0.42±0.18 0.50 (4X) 5.45 5.55 BOTTOM VIEW 5.3 X 5.3 51-85152-*B 4 ...

  • Page 32

    ... Document History Page Document Title: CYWUSB6935 WirelessUSB™ LR 2.4-GHz DSSS Radio SoC Document Number: 38-16008 Orig. of REV. ECN NO. Issue Date Change ** 207428 See ECN TGE *A 275349 See ECN ZTK *B 291015 See ECN ZTK *C 335774 See ECN TGE *D 391311 See ECN TGE Document #: 38-16008 Rev ...