HT45R22E Holtek Semiconductor, HT45R22E Datasheet - Page 15

• Manufacturer Part Number: HT45R22E
• Description: Remote Type 8-bit OTP MCU
• Manufacturer: Holtek Semiconductor

Accumulator - ACC
The Accumulator is central to the operation of any
microcontroller and is closely related with operations
carried out by the ALU. The Accumulator is the place
where all intermediate results from the ALU are stored.
Without the Accumulator it would be necessary to write
the result of each calculation or logical operation such
as addition, subtraction, shift, etc., to the Data Memory
resulting in higher programming and timing overheads.
Data transfer operations usually involve the temporary
storage function of the Accumulator; for example, when
transferring data between one user defined register and
another, it is necessary to do this by passing the data
through the Accumulator as no direct transfer between
two registers is permitted.
Program Counter Low Register - PCL
To provide additional program control functions, the low
byte of the Program Counter is made accessible to pro-
grammers by locating it within the Special Purpose area
of the Data Memory. By manipulating this register, direct
jumps to other program locations are easily imple-
mented. Loading a value directly into this PCL register
will cause a jump to the specified Program Memory lo-
cation. However, as the register is only 8-bit wide, only
jumps within the current Program Memory page are per-
mitted. When such operations are used, note that a
dummy cycle will be inserted.
Look-up Table Registers - TBLP, TBLH
These two special function registers are used to control
operation of the look-up table which is stored in the Pro-
gram Memory. TBLP is the table pointer and indicates
the location where the table data is located. Its value
must be setup before any table read commands are ex-
ecuted. Its value can be changed, for example using the
Rev. 1.00
INC or DEC instructions, allowing for easy table data
Indirect Addressing Program Example
The important point to note here is that in the example shown above, no reference is made to specific Data Memory
addresses.
data .section
adres1 db ?
adres2 db ?
adres3 db ?
adres4 db ?
block
code .section at 0 code
org
start:
loop:
continue:
mov a,04h
mov block,a
mov a,offset adres1
mov mp0,a
clr IAR0
inc mp0
sdz block
jmp loop
00h
db ?
data
; setup size of block
; Accumulator loaded with first RAM address
; setup memory pointer with first RAM address
; clear the data at address defined by MP0
; increment memory pointer
; check if last memory location has been cleared
15
pointing and reading. TBLH is the location where the
high order byte of the table data is stored after a table
read data instruction has been executed. Note that the
lower order table data byte is transferred to a user de-
fined location.
Status Register - STATUS
This 8-bit register contains the zero flag (Z), carry flag
(C), auxiliary carry flag (AC), overflow flag (OV), power
down flag (PDF), and watchdog time-out flag (TO).
These arithmetic/logical operation and system manage-
ment flags are used to record the status and operation of
the microcontroller.
With the exception of the TO and PDF flags, bits in the
status register can be altered by instructions like most
other registers. Any data written into the status register
will not change the TO or PDF flag. In addition, opera-
tions related to the status register may give different re-
sults due to the different instruction operations. The TO
flag can be affected only by a system power-up, a WDT
time-out or by executing the CLR WDT or HALT in-
struction. The PDF flag is affected only by executing the
power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, on entering an interrupt sequence or execut-
ing a subroutine call, the status register will not be
pushed onto the stack automatically. If the contents of
the status registers are important and if the interrupt rou-
tine can change the status register, precautions must be
taken to correctly save it. Note that bits 0~3 of the
STATUS register are both readable and writeable bits.
HALT or CLR WDT instruction or during a system
HT45R22E
March 17, 2010
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