HT45R22E Holtek Semiconductor, HT45R22E Datasheet - Page 24

• Manufacturer Part Number: HT45R22E
• Description: Remote Type 8-bit OTP MCU
• Manufacturer: Holtek Semiconductor

Mode Switching
The devices are switched between one mode and an-
other using a combination of the CLKMOD bit in the
CTRL0 register and the HALT instruction. The CLKMOD
bit chooses whether the system runs in either the Nor-
mal or Slow Mode by selecting the system clock to be
sourced from either a high or low frequency oscillator.
The HALT instruction forces the system into either the
Idle or Sleep Mode, depending upon whether the LXT
oscillator is running or not. The HALT instruction oper-
ates independently of the CLKMOD bit condition.
When a HALT instruction is executed and the LXT oscil-
lator is not running, the system enters the Sleep mode
the following conditions exist:
Standby Current Considerations
As the main reason for entering the Idle/Sleep Mode is
to keep the current consumption of the MCU to as low a
value as possible, perhaps only in the order of several
micro-amps, there are other considerations which must
also be taken into account by the circuit designer if the
power consumption is to be minimised.
Special attention must be made to the I/O pins on the
device. All high-impedance input pins must be con-
nected to either a fixed high or low level as any floating
input pins could create internal oscillations and result in
increased current consumption. Care must also be
taken with the loads, which are connected to I/O pins,
which are setup as outputs. These should be placed in a
condition in which minimum current is drawn or con-
nected only to external circuits that do not draw current,
such as other CMOS inputs.
If the configuration options have enabled the Watchdog
Timer internal oscillator LIRC then this will continue to
run when in the Idle/Sleep Mode and will thus consume
some power. For power sensitive applications it may be
therefore preferable to use the system clock source for
the Watchdog Timer. The LXT, if configured for use, will
also consume a limited amount of power, as it continues
Rev. 1.00
The system oscillator will stop running and the appli-
cation program will stop at the HALT instruction.
The Data Memory contents and registers will maintain
their present condition.
The WDT will be cleared and resume counting if the
WDT clock source is selected to come from the WDT
or LXT oscillator. The WDT will stop if its clock source
originates from the system clock.
The I/O ports will maintain their present condition.
In the status register, the Power Down flag, PDF, will
be set and the Watchdog time-out flag, TO, will be
cleared.
24
to run when the device enters the Idle/Sleep Mode. To
keep the LXT power consumption to a minimum level
the LXTLP bit in the CTRL0 register, which controls the
low power function, should be set high.
Wake-up
After the system enters the Idle/Sleep Mode, it can be
woken up from one of various sources listed as follows:
If the system is woken up by an external reset, the de-
vice will experience a full system reset, however, if the
device is woken up by a WDT overflow, a Watchdog
Timer reset will be initiated. Although both of these
wake-up methods will initiate a reset operation, the ac-
tual source of the wake-up can be determined by exam-
ining the TO and PDF flags. The PDF flag is cleared by a
system power-up or executing the clear Watchdog
Timer instructions and is set when executing the HALT
instruction. The TO flag is set if a WDT time-out occurs,
and causes a wake-up that only resets the Program
Counter and Stack Pointer, the other flags remain in their
original status.
Pins PA0~PA7 and PC0~PC7 can be setup via the
PAWK and PCWK registers to permit a negative transi-
tion on the pin to wake-up the system. When a PA0~PA7
or PC0~PC7 pin wake-up occurs, the program will re-
sume execution at the instruction following the HALT
instruction.
If the system is woken up by an interrupt, then two possi-
ble situations may occur. The first is where the related
interrupt is disabled or the interrupt is enabled but the
stack is full, in which case the program will resume exe-
cution at the instruction following the HALT instruction.
In this situation, the interrupt which woke-up the device
will not be immediately serviced, but will rather be ser-
viced later when the related interrupt is finally enabled or
when a stack level becomes free. The other situation is
where the related interrupt is enabled and the stack is not
full, in which case the regular interrupt response takes
place. If an interrupt request flag is set to 1 before enter-
ing the Idle/Sleep Mode, then any interrupt requests will
not generate a wake-up function of the related interrupt
will be ignored. No matter what the source of the wake-up
event is, once a wake-up event occurs, there will be a
time delay before normal program execution resumes.
Consult the table for the related time.
An external reset
An external falling edge on PA0 to PA7 or PC0 to PC7
A system interrupt
A WDT overflow
HT45R22E
March 17, 2010
www.DataSheet4U.com