HT45R22E Holtek Semiconductor, HT45R22E Datasheet - Page 18

• Manufacturer Part Number: HT45R22E
• Description: Remote Type 8-bit OTP MCU
• Manufacturer: Holtek Semiconductor

Wake-up Function Register - PAWK, PCWK
When the microcontroller enters the Idle/Sleep Mode,
various methods exist to wake the device up and con-
tinue with normal operation. One method is to allow a
falling edge on the I/O pins to have a wake-up function.
This register is used to select which Port A or Port C I/O
pins are used to have this wake-up function.
Pull-high Registers - PAPU, PBPU, PCPU
The I/O pins, if configured as inputs, can have internal
pull-high resistors connected, which eliminates the need
for external pull-high resistors. These registers select
which I/O pins are connected to internal pull-high resis-
tors.
Software COM Register - SCOMC
The pins PB0~PB3 on Port B can be used as SCOM
lines to drive an external LCD panel. To implement this
function, the SCOMC register is used to setup the cor-
rect bias voltages on these pins.
Comparator & Operational Amplifier Control
Registers - CMP0C, CMP1C, COPA0C, COPA1C,
COPA2C, COPA3C, OPA0OC, OPA1OC
These registers are used to control the internal com-
parator and two operational amplifiers in the device. The
internal bits within registers are used to enable and dis-
able the comparator and operational amplifiers, monitor
the output, select the operating current and control the
interrupt edge of the comparator, select the internal soft-
ware gain and reference voltage bias and control the off-
set cancellation function of the operational amplifiers.
EEPROM Data Memory
The HT45R22E device contains an internal 8K capacity
EEPROM memory with a 1024 8 bits structure. An
EEPROM, which stands for Electrically Erasable Pro-
grammable Read Only Memory, is by its nature a
non-volatile form of memory, with data retention even
when its power supply is removed. By incorporating this
kind of data memory, a whole new host of application
possibilities are made available to the designer. The
availability of EEPROM storage allows information such
as product identification numbers, calibration values,
specific user data, system setup data or other product
information to be stored directly within the product
microcontroller.
Accessing the EEPROM Data Memory
The internal EEPROM Data Memory has a 2-wire serial
interface structure for data transfer. These two lines are
the Serial Data line on pin SDA, and the Serial Clock line
on pin SCL. The SDA line is bi-directional and is the line
where the data is written to and read from the EEPROM.
Rev. 1.00
18
The SCL line is an input line and is the clock signal for
both the reading and writing of data. These two
EEPROM pins are shared with I/O pins as shown in the
table. Any pull-high resistors configuration options for
these pin shared pins also remain valid for the
EEPROM. Care must be taken if these pins are used as
normal I/O pins, as any signals on the pins may be seen
by the EEPROM as a valid read or write operation com-
mand. If this happens the EEPROM may inadvertently
generate signals on its SDA line which could create un-
expected programming errors. The Internal EEPROM
can be directly controlled using the pin-shared I/O pins
or it can be directly connected to external I/Os and con-
trolled by some other external master device. In this lat-
ter case care should be taken to ensure that the
pin-shared I/Os for the SDA and SCL lines are both
setup as inputs. In addition, the EEPROM provides a
write protection function and that is controlled by PB0
pin.
EEPROM Functional Description
Memory Organization
Internally organized with 1024 8-bit words, the 8K re-
quires a 10-bit data word address for random word ad-
dressing.
At V
At V
EEPROM Pin
I/O Pin
Capacity
Serial clock - SCL
The SCL input is used for positive edge clock data into
each EEPROM device and negative edge clock data
out of each device.
Serial data - SDA
The SDA pin is bidirectional for serial data transfer.
The pin is open drain driven and may be wired-OR
with any number of other open drain or open collector
devices.
Write protect - WP
The EEPROM has a write protect pin that provides
hardware data protection. The write protect pin allows
normal read/write operations when the connection is
grounded. When the write protect pin is connected to
V
ates as shown in the following table.
WP Pin Status
DD
DD
SS
, the write protection feature is enabled and oper-
Type
EEPROM I/O Shared Pins
Full Array (8K)
Normal Read/Write Operations
SDA
PB2
Protect Array
1024 8 bits
HT45R22E
SCL
PB1
HT45R22E
March 17, 2010
www.DataSheet4U.com
PB0
WP