HT45R22E Holtek Semiconductor, HT45R22E Datasheet - Page 16

• Manufacturer Part Number: HT45R22E
• Description: Remote Type 8-bit OTP MCU
• Manufacturer: Holtek Semiconductor

Interrupt Control Registers - INTC0, INTC1, MFIC
These 8-bit registers, known as INTC0, INTC1 and
MFIC, control the operation of external, internal timers,
time base and multi-function interrupts. The MFIC regis-
ter is used to control a comparator and two operational
amplifier interrupts. By setting various bits within these
registers using standard bit manipulation instructions,
the enable/disable function of each interrupt can be in-
dependently controlled. A master interrupt bit within this
register, the EMI bit, acts like a global enable/disable
and is used to set all of the interrupt enable bits on or off.
This bit is cleared when an interrupt routine is entered to
disable further interrupt and is set by executing the
Timer/Event Counter Registers
This device contains two 8-bits wide Timer/Event Coun-
ters. One is known as Timer/Event Counter 0, while the
other is known as Timer/Event Counter 1. Timer/Event
Counter 0 has an associated timer register known as
TMR0, and Timer/Event Counter 1 has an associated
timer register known as TMR1. These are the register
locations where the timer values are located. Two asso-
ciated control registers, known as TMR0C and TMR1C,
contain the setup information for the two individual
Timer/Event Counters.
Rev. 1.00
RETI instruction.
STATUS Register
Bit 7, 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
POR
R/W
Bit
Unimplemented, read as 0
TO: Watchdog Time-Out flag
0: After power up or executing the CLR WDT or HALT instruction
1: A watchdog time-out occurred.
PDF: Power down flag
0: After power up or executing the CLR WDT instruction
1: By executing the HALT instruction
OV: Overflow flag
0: no overflow
1: an operation results in a carry into the highest-order bit but not a carry out of the
Z: Zero flag
0: The result of an arithmetic or logical operation is not zero
1: The result of an arithmetic or logical operation is zero
AC: Auxiliary flag
0: no auxiliary carry
1: an operation results in a carry out of the low nibbles in addition, or no borrow from the
C: Carry flag
0: no carry-out
1: an operation results in a carry during an addition operation or if a borrow does not take place
C is also affected by a rotate through carry instruction.
7
high nibble into the low nibble in subtraction
during a subtraction operation
highest-order bit or vice versa.
6
TO
R
5
0
PDF
16
R
4
0
Input/Output Ports and Control Registers
Within the area of Special Function Registers, the port
PA, PB, PC etc., data I/O registers and their associated
control register PAC, PBC, PCC etc., play a prominent
role. These registers are mapped to specific addresses
within the Data Memory as shown in the Data Memory
table. The data I/O registers, are used to transfer the ap-
propriate output or input data on the port. The control
registers specifies which pins of the port are set as in-
puts and which are set as outputs. To setup a pin as an
input, the corresponding bit of the control register must
be set high, for an output it must be set low. During pro-
gram initialisation, it is important to first setup the control
registers to specify which pins are outputs and which
are inputs before reading data from or writing data to the
I/O ports. One flexible feature of these registers is the
ability to directly program single bits using the SET
[m].i and CLR [m].i instructions. The ability to change
I/O pins from output to input and vice versa by manipu-
lating specific bits of the I/O control registers during nor-
mal program operation is a useful feature of these
devices.
R/W
OV
3
x
R/W
Z
2
x
R/W
AC
1
x
HT45R22E
March 17, 2010
www.DataSheet4U.com
x unknown
R/W
C
0
x