HT45R22E Holtek Semiconductor, HT45R22E Datasheet - Page 57

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HT45R22E

Manufacturer Part Number
HT45R22E
Description
Remote Type 8-bit OTP MCU
Manufacturer
Holtek Semiconductor
Datasheet
Note:
Rev. 1.00
Rotate
RRA [m]
RR [m]
RRCA [m]
RRC [m]
RLA [m]
RL [m]
RLCA [m]
RLC [m]
Data Move
MOV A,[m]
MOV [m],A
MOV A,x
Bit Operation
CLR [m].i
SET [m].i
Branch
JMP addr
SZ [m]
SZA [m]
SZ [m].i
SNZ [m].i
SIZ [m]
SDZ [m]
SIZA [m]
SDZA [m]
CALL addr
RET
RET A,x
RETI
Table Read
TABRDC [m]
TABRDL [m]
Miscellaneous
NOP
CLR [m]
SET [m]
CLR WDT
CLR WDT1
CLR WDT2
SWAP [m]
SWAPA [m]
HALT
Mnemonic
1. For skip instructions, if the result of the comparison involves a skip then two cycles are required,
2. Any instruction which changes the contents of the PCL will also require 2 cycles for execution.
3. For the CLR WDT1 and CLR WDT2 instructions the TO and PDF flags may be affected by
if no skip takes place only one cycle is required.
the execution status. The TO and PDF flags are cleared after both CLR WDT1 and
remain unchanged.
CLR WDT2 instructions are consecutively executed. Otherwise the TO and PDF flags
Rotate Data Memory right with result in ACC
Rotate Data Memory right
Rotate Data Memory right through Carry with result in ACC
Rotate Data Memory right through Carry
Rotate Data Memory left with result in ACC
Rotate Data Memory left
Rotate Data Memory left through Carry with result in ACC
Rotate Data Memory left through Carry
Move Data Memory to ACC
Move ACC to Data Memory
Move immediate data to ACC
Clear bit of Data Memory
Set bit of Data Memory
Jump unconditionally
Skip if Data Memory is zero
Skip if Data Memory is zero with data movement to ACC
Skip if bit i of Data Memory is zero
Skip if bit i of Data Memory is not zero
Skip if increment Data Memory is zero
Skip if decrement Data Memory is zero
Skip if increment Data Memory is zero with result in ACC
Skip if decrement Data Memory is zero with result in ACC
Subroutine call
Return from subroutine
Return from subroutine and load immediate data to ACC
Return from interrupt
Read table (current page) to TBLH and Data Memory
Read table (last page) to TBLH and Data Memory
No operation
Clear Data Memory
Set Data Memory
Clear Watchdog Timer
Pre-clear Watchdog Timer
Pre-clear Watchdog Timer
Swap nibbles of Data Memory
Swap nibbles of Data Memory with result in ACC
Enter Idle/Sleep Mode
Description
57
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
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Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
note
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1
1
1
1
2
2
2
2
2
1
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HT45R22E
Flag Affected
March 17, 2010
TO, PDF
TO, PDF
TO, PDF
TO, PDF
None
None
None
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None
None
None
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