LM3S6950 Luminary Micro, Inc, LM3S6950 Datasheet - Page 28

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LM3S6950

Manufacturer Part Number
LM3S6950
Description
Lm3s6950 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Architectural Overview
28
UART
Analog Comparators
I
PWM
2
C
Three fully programmable 16C550-type UARTs with IrDA support
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
Programmable baud-rate generator allowing speeds up to 3.125 Mbps
Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
Standard asynchronous communication bits for start, stop, and parity
False-start-bit detection
Line-break generation and detection
Three independent integrated analog comparators
Configurable for output to: drive an output pin or generate an interrupt
Compare external pin input to external pin input or to internal programmable voltage reference
Master and slave receive and transmit operation with transmission speed up to 100 Kbps in
Standard mode and 400 Kbps in Fast mode
Interrupt generation
Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
Three PWM generator blocks, each with one 16-bit counter, two comparators, a PWM
generator, and a dead-band generator
One 16-bit counter
Two PWM comparators
Runs in Down or Up/Down mode
Output frequency controlled by a 16-bit load value
Load value updates can be synchronized
Produces output signals at zero and load value
Comparator value updates can be synchronized
Preliminary
July 25, 2008

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