LM3S6950 Luminary Micro, Inc, LM3S6950 Datasheet - Page 97

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LM3S6950

Manufacturer Part Number
LM3S6950
Description
Lm3s6950 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Device Capabilities 4 (DC4)
Base 0x400F.E000
Offset 0x01C
Type RO, reset 0x5100.007F
July 25, 2008
Bit/Field
27:25
reserved
23:7
31
30
29
28
24
6
5
4
RO
RO
31
15
0
0
EPHY0
Register 17: Device Capabilities 4 (DC4), offset 0x01C
This register provides a list of features available in the system. The Stellaris family uses this register
format to indicate the availability of the following family features in the specific device: Ethernet MAC
and PHY, GPIOs, and CCP I/Os. The format of this register is consistent with the RCGC2, SCGC2,
and DCGC2 clock control registers and the SRCR2 software reset control register.
RO
RO
30
14
1
0
reserved
reserved
reserved
reserved
reserved
RO
RO
EMAC0
29
13
EPHY0
GPIOG
GPIOF
GPIOE
0
0
E1588
Name
EMAC0
RO
RO
28
12
1
0
reserved
RO
RO
27
11
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
reserved
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
1
0
1
0
1
0
1
1
1
Preliminary
E1588
RO
RO
24
1
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Ethernet PHY0 Present
When set, indicates that Ethernet PHY module 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Ethernet MAC0 Present
When set, indicates that Ethernet MAC module 0 is present.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
1588 Capable
When set, indicates that that EMAC0 is 1588-capable.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO Port G Present
When set, indicates that GPIO Port G is present.
GPIO Port F Present
When set, indicates that GPIO Port F is present.
GPIO Port E Present
When set, indicates that GPIO Port E is present.
RO
RO
23
0
7
0
GPIOG
RO
RO
22
0
6
1
GPIOF
RO
RO
21
0
5
1
GPIOE
RO
RO
20
0
4
1
reserved
GPIOD
LM3S6950 Microcontroller
RO
RO
19
0
3
1
GPIOC
RO
RO
18
0
2
1
GPIOB
RO
RO
17
0
1
1
GPIOA
RO
RO
16
0
0
1
97

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