z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 121

• Manufacturer Part Number: z80189
• Description: Z80180, Z8s180, Z8l180 Mpu Operation
• Manufacturer: ZiLOG Semiconductor

106
UM005003-0703
Z8018x
Family MPU User Manual
Figure 46.
To initiate memory to/from memory DMA transfer for channel 0, perform
the following operations.
1. Load the memory source and destination address into SAR0 and DAR0
2. Specify memory to/from memory mode and address increment/
3. Load the number of bytes to transfer in BCR0.
4. Specify burst or cycle steal mode in the MMOD bit of DCNTL.
5. Program DE0 =
decrement in the SM0 SM1, DM0 and DM1 bits of DMODE.
the DMA operation starts one machine cycle later. If interrupt occurs
at the same time, the DIE0 bit must be set to
Address
MREQ
Data
WR
Phi
RD
DMA Timing Diagram-CYCLE STEAL Mode
DMA cycle
1
T1
(with DWE0 =
CPU cycle
LD g,m
Op Code
address
T2
m
T3
T1
DMA cycle (transfer 1 byte)
Source
memory
address
T2
Read data
0
T3
in the same access) in DSTAT and
T1
Destination
memory
address
T2
Write data,
T3
1
T1
.
CPU cycle
LD g,m
operand
address
T2
T3
m
T1
DMA cycle
T2