z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 186

• Manufacturer Part Number: z80189
• Description: Z80180, Z8s180, Z8l180 Mpu Operation
• Manufacturer: ZiLOG Semiconductor

Figure 73.
Circuit Board design should observe the following parameters.
•
•
•
•
Signal line layout must avoid areas marked with the shaded area of Figure
73.
Locate the crystal and load capacitors as close to the IC as physically
possible to reduce noise.
Signal lines must not run parallel to the clock oscillator inputs. In
particular, the clock input circuitry and the system clock output (pin 64)
must be separated as much as possible.
V
circuitry.
Resistivity between XTAL or EXTAL and the other pins must be
greater than 10M ohms.
CC
Crystal
power lines must be separated from the clock oscillator input
Example of Board Design
1
3
2
20 mm max
C
Top View
L
Z8X180
C
L
GND
64
Signal line layout must
avoid shaded areas
Note: Pin mumbers valid only
Family MPU User Manual
Phi
for DIP configuration
UM005003-0703
Z8018x
171