mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 152

• Manufacturer Part Number: mc68hc908gp32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Serial Communications Interface Module (SCI)
FE — Receiver Framing Error Bit
PE — Receiver Parity Error Bit
13.8.5 SCI Status Register 2
SCI status register 2 contains flags to signal the following conditions:
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This clearable, read-only bit is set when a logic 0 is accepted as the stop bit. FE generates an SCI error
CPU interrupt request if the FEIE bit in SCC3 also is set. Clear the FE bit by reading SCS1 with FE set
and then reading the SCDR. Reset clears the FE bit.
This clearable, read-only bit is set when the SCI detects a parity error in incoming data. PE generates
an SCI error CPU interrupt request if the PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1
with PE set and then reading the SCDR. Reset clears the PE bit.
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1 = Framing error detected
0 = No framing error detected
1 = Parity error detected
0 = No parity error detected
Break character detected
Incoming data
BYTE 1
BYTE 1
READ SCS1
READ SCDR
SCRF = 1
BYTE 1
OR = 0
Figure 13-13. Flag Clearing Sequence
MC68HC908GP32 Data Sheet, Rev. 10
READ SCDR
READ SCS1
DELAYED FLAG CLEARING SEQUENCE
NORMAL FLAG CLEARING SEQUENCE
BYTE 2
BYTE 2
SCRF = 1
BYTE 1
OR = 0
READ SCDR
READ SCS1
SCRF = 1
BYTE 2
OR = 0
BYTE 3
BYTE 3
READ SCDR
READ SCDR
READ SCS1
READ SCS1
SCRF = 1
SCRF = 1
BYTE 3
BYTE 3
OR = 1
OR = 0
BYTE 4
BYTE 4
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