mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 220

• Manufacturer Part Number: mc68hc908gp32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Development Support
18.3 Monitor Module (MON)
The monitor module allows debugging and programming of the microcontroller unit (MCU) through a
single-wire interface with a host computer. Monitor mode entry can be achieved without use of the higher
test voltage, V
requirements for in-circuit programming.
Features of the monitor module include:
18.3.1 Functional Description
Figure 18-8
The monitor ROM receives and executes commands from a host computer.
and
computer via a standard RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the Flash difficult for
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unauthorized users.
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Figure 18-11
Normal user-mode pin functionality
One pin dedicated to serial communication between MCU and host computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Standard communication baud rate
Execution of code in random-access memory (RAM) or Flash
Flash memory security feature
Flash memory programming interface
External 4.92 MHz or 9.83 MHz clock used to generate internal frequency of 2.4576 MHz
Enhanced PLL option to allow use of 32.768 kHz crystal to generate internal bus frequency of
2.4576 MHz
Monitor mode entry without high voltage, V
$FF)
Normal monitor mode entry if high voltage, V
shows a simplified monitor mode entry flowchart.
TST
, as long as vector addresses $FFFE and $FFFF are blank, thus reducing the hardware
show example circuits used to enter monitor mode and communicate with a host
MC68HC908GP32 Data Sheet, Rev. 10
(1)
TST
TST
, if reset vector is blank ($FFFE and $FFFF contain
, is applied to IRQ
Figure 18-9, Figure
Freescale Semiconductor
18-10,