mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 161

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mc68hc908gp32

Manufacturer Part Number
mc68hc908gp32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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14.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 CGMXCLK cycles to allow resetting of
external peripherals. The internal reset signal IRST continues to be asserted for an additional 32 cycles.
See Figure
or POR. (See
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other chips within a system
built around the MCU.
14.3.2.1 Power-On Reset
When power is first applied to the MCU, the power-on reset module (POR) generates a pulse to indicate
that power-on has occurred. The external reset pin (RST) is held low while the SIM counter counts out
4096 + 32 CGMXCLK cycles. Thirty-two CGMXCLK cycles later, the CPU and memories are released
from reset to allow the reset vector sequence to occur.
Freescale Semiconductor
14-5. An internal reset can be caused by an illegal address, illegal opcode, COP timeout, LVI,
CGMOUT
CGMXCLK
Figure
For LVI or POR resets, the SIM cycles through 4096 + 32 CGMXCLK
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure
RST
IRST
IAB
RST
IAB
14-6.)
14-5.
PC
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 14-6. Sources of Internal Reset
RST PULLED LOW BY MCU
Figure 14-4. External Reset Timing
Figure 14-5. Internal Reset Timing
MC68HC908GP32 Data Sheet, Rev. 10
COPRST
32 CYCLES
POR
LVI
NOTE
INTERNAL RESET
32 CYCLES
VECT H VECT L
VECTOR HIGH
Reset and System Initialization
161

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