mc68hc11f1cpu3 Freescale Semiconductor, Inc, mc68hc11f1cpu3 Datasheet - Page 69

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mc68hc11f1cpu3

Manufacturer Part Number
mc68hc11f1cpu3
Description
Mc68hc11f1 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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5.3.1 Highest Priority Interrupt and Miscellaneous Register
HPRIO — Highest Priority I-Bit Interrupt and Miscellaneous
RBOOT — Read Bootstrap ROM
TECHNICAL DATA
RESET:
The maskable interrupt sources have the following priority arrangement:
Any one of these interrupts can be assigned the highest maskable interrupt priority by
writing the appropriate value to the PSEL bits in the HPRIO register. Otherwise, the
priority arrangement remains the same. An interrupt that is assigned highest priority is
still subject to global masking by the I bit in the CCR, or by any associated local bits.
Interrupt vectors are not affected by priority assignment. To avoid race conditions, HP-
RIO can only be written while I-bit interrupts are inhibited.
*The values of the RBOOT, SMOD, MDA, and IRV reset bits depend on the operating mode selected during power-
Set to one out of reset in bootstrap mode. Valid while in special modes only. Can be
read any time. Can only be written in special modes. Refer to SECTION 4 OPERAT-
ING MODES AND ON-CHIP MEMORY for more information.
up. Refer to Table 4–3.
1. POR or RESET pin
2. Clock monitor reset
3. COP watchdog reset
4. XIRQ interrupt
5. Illegal opcode interrupt
6. Software interrupt (SWI)
1. IRQ
2. Real-time interrupt
3. Timer input capture 1
4. Timer input capture 2
5. Timer input capture 3
6. Timer output compare 1
7. Timer output compare 2
8. Timer output compare 3
9. Timer output compare 4
10. Timer input capture 4/output compare 5
11. Timer overflow
12. Pulse accumulator overflow
13. Pulse accumulator input edge
14. SPI transfer complete
15. SCI system (refer to Figure 5-5)
RBOOT*
Bit 7
0
0
1
0
SMOD*
0
0
1
1
6
Freescale Semiconductor, Inc.
For More Information On This Product,
MDA*
5
0
1
0
1
RESETS AND INTERRUPTS
Go to: www.freescale.com
IRV
4
0
1
0
1
PSEL3
3
0
0
0
0
PSEL2
2
1
1
1
1
PSEL1
1
0
0
0
0
PSEL0
Bit 0
1
1
1
1
Single Chip
Expanded
Bootstrap
Special Test
$103C
5-7

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