mc68hc11f1cpu3 Freescale Semiconductor, Inc, mc68hc11f1cpu3 Datasheet - Page 92

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mc68hc11f1cpu3

Manufacturer Part Number
mc68hc11f1cpu3
Description
Mc68hc11f1 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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R8 — Receive Data Bit 8
T8 — Transmit Data Bit 8
M — Mode (Select Character Format)
WAKE — Wakeup by Address Mark/Idle
7.6.3 Serial Communications Control Register 2
SCCR2 — SCI Control Register 2
TIE — Transmit Interrupt Enable
TCIE — Transmit Complete Interrupt Enable
RIE — Receiver Interrupt Enable
ILIE — Idle-Line Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
7-6
RESET:
If M bit is set, R8 stores the ninth bit in the receive data character.
If M bit is set, T8 stores the ninth bit in the transmit data character.
The SCCR2 register provides the control bits that enable or disable individual SCI
functions.
When TE goes from zero to one, one unit of idle character time (logic one) is queued
as a preamble.
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
0 = Wakeup by IDLE line recognition
1 = Wakeup by address mark (most significant data bit set)
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
0 = Transmitter disabled
1 = Transmitter enabled
0 = Receiver disabled
1 = Receiver enabled
Bit 7
TIE
0
TCIE
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
SERIAL COMMUNICATIONS INTERFACE
RIE
5
0
Go to: www.freescale.com
ILIE
4
0
TE
0
3
RE
2
0
RWU
1
0
TECHNICAL DATA
Bit 0
SBK
0
MC68HC11F1
$102D

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