mc68hc11f1cpu3 Freescale Semiconductor, Inc, mc68hc11f1cpu3 Datasheet - Page 99

• Manufacturer Part Number: mc68hc11f1cpu3
• Description: Mc68hc11f1 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

8.1 Functional Description
TECHNICAL DATA
The serial peripheral interface (SPI), an independent serial communications sub-
system, allows the MCU to communicate synchronously with peripheral devices, such
as transistor-transistor logic (TTL) shift registers, liquid crystal display (LCD) drivers,
analog-to-digital converter subsystems, and other microprocessors. The SPI is also
capable of inter-processor communication in a multiple master system. The SPI sys-
tem can be configured as either a master or a slave device. When configured as a
master, data transfer rates can be as high as one-half the E-clock rate (2.5 Mbits per
second for a 5-MHz bus frequency). When configured as a slave, data transfers can
be as fast as the E-clock rate (5 Mbits per second for a 5-MHz bus frequency).
The central element in the SPI system is the block containing the shift register and the
read data buffer. The system is single buffered in the transmit direction and double
buffered in the receive direction. This means that new data for transmission cannot be
written to the shifter until the previous transfer is complete; however, received data is
transferred into a parallel read data buffer so the shifter is free to accept a second se-
rial character. As long as the first character is read out of the read data buffer before
the next serial character is ready to be transferred, no overrun condition occurs. A sin-
gle MCU register address is used for reading data from the read data buffer and for
writing data to the shifter.
The SPI status block represents the SPI status flags (transfer complete, write collision,
and mode fault) located in the SPI status register (SPSR). The SPI control block rep-
resents those functions that control the SPI system through the serial peripheral con-
trol register (SPCR).
Refer to Figure 8-1, which shows the SPI block diagram.
SECTION 8 SERIAL PERIPHERAL INTERFACE
Freescale Semiconductor, Inc.
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SERIAL PERIPHERAL INTERFACE
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8-1