mc68hc705c4acfn Freescale Semiconductor, Inc, mc68hc705c4acfn Datasheet - Page 117

• Manufacturer Part Number: mc68hc705c4acfn
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

10.5 SCI Operation
10.5.1 Transmitter
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
MOTOROLA
The SCI allows full-duplex, asynchronous, RS232 or RS422 serial
communication between the MCU and remote devices, including other
MCUs. The transmitter and receiver of the SCI operate independently,
although they use the same baud-rate generator. Operation of the SCI
transmitter and receiver is described here.
Figure 10-2
summary of the SCI transmitter input/output (I/O) registers.
•
•
Character Length — The transmitter can accommodate either
8-bit or 9-bit data. The state of the M bit in SCI control register 1
(SCCR1) determines character length. When transmitting 9-bit
data, bit T8 in SCCR1 is the ninth bit (bit 8).
Character Transmission — During transmission, the transmit shift
register shifts a character out to the PD1/TDO pin. The SCI data
register (SCDR) is the write-only buffer between the internal data
bus and the transmit shift register.
Writing a logic 1 to the TE bit in SCI control register 2 (SCCR2) and
then writing data to the SCDR begins the transmission. At the start
of a transmission, transmitter control logic automatically loads the
transmit shift register with a preamble of logic 1s. After the
preamble shifts out, the control logic transfers the SCDR data into
the shift register. A logic 0 start bit automatically goes into the least
significant bit (LSB) position of the shift register, and a logic 1 stop
bit goes into the most significant bit (MSB) position.
When the data in the SCDR transfers to the transmit shift register,
the transmit data register empty (TDRE) flag in the SCI status
register (SCSR) becomes set. The TDRE flag indicates that the
SCDR can accept new data from the internal data bus.
When the shift register is not transmitting a character, the
PD1/TDO pin goes to the idle condition, logic 1. If software clears
the TE bit during the idle condition, and while TDRE is set, the
transmitter relinquishes control of the PD1/TDO pin.
Serial Communications Interface (SCI)
shows the structure of the SCI transmitter.
Serial Communications Interface (SCI)
Figure 10-3
Technical Data
SCI Operation
is a
117