mc68hc705c4acfn Freescale Semiconductor, Inc, mc68hc705c4acfn Datasheet - Page 78

• Manufacturer Part Number: mc68hc705c4acfn
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Parallel Input/Output (I/O)
7.4.2 Data Direction Register B
Technical Data
78
NOTE:
Address:
The contents of data direction register B (DDRB) shown in
determine whether each port B pin is an input or an output. Writing a
logic 1 to a DDRB bit enables the output buffer for the associated port B
pin; a logic 0 disables the output buffer. A reset clears all DDRB bits,
configuring all port B pins as inputs. If the pullup devices are enabled by
mask option, setting a DDRB bit to a logic 1 turns off the pullup device
for that pin.
DDRB7–DDRB0 — Port B Data Direction Bits
Avoid glitches on port B pins by writing to the port B data register before
changing DDRB bits from logic 0 to logic 1.
Reset:
Read:
Write:
These read/write bits control port B data direction. Reset clears bits
DDRB7–DDRB0.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
$0005
Bit 7
0
Figure 7-5. Data Direction Register B (DDRB)
Parallel Input/Output (I/O)
DDRB6
6
0
DDRB5
5
0
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
DDRB4
4
0
DDRB3
3
0
DDRB2
2
0
DDRB1
1
0
Figure 7-5
MOTOROLA
DDRB0
Bit 0
0