mc68hc705c4acfn Freescale Semiconductor, Inc, mc68hc705c4acfn Datasheet - Page 93

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mc68hc705c4acfn

Manufacturer Part Number
mc68hc705c4acfn
Description
M68hc05 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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8.4.3 Timer Registers
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
MOTOROLA
Register Name and Address: Timer Register High — $0018
Register Name and Address: Timer Register Low — $0019
TOF — Timer Overflow Flag
Bits 4–0 — Not used; these bits always read 0
The read-only timer registers shown in
high and low bytes of the 16-bit counter. Reading TRH before reading
TRL causes TRL to be latched until TRL is read. Reading TRL after
reading the timer status register clears the timer overflow flag bit (TOF).
Writing to the timer registers has no effect.
Reading TRH returns the current value of the high byte of the counter
and causes the low byte to be latched into a buffer, as shown in
Figure
more than once. Reading TRL reads the transparent low byte buffer and
completes the read sequence of the timer registers.
Reset:
Reset:
Read:
Read:
Write:
Write:
The TOF bit is set automatically when the 16-bit counter rolls over
from $FFFF to $0000. Clear the TOF bit by reading the timer status
register with TOF set and then reading the low byte ($0019) of the
timer registers. Reset has no effect on TOF.
1 = Timer overflow
0 = No timer overflow
8-8. The buffer value remains fixed even if the high byte is read
Bit 15
Bit 7
Bit 7
Figure 8-7. Timer Registers (TRH and TRL)
Capture/Compare Timer
= Unimplemented
14
6
6
13
5
5
Reset initializes TRH to $FF
Reset initializes TRL to $FC
12
4
4
Figure 8-7
11
3
3
10
contain the current
2
2
Capture/Compare Timer
Timer I/O Registers
1
9
1
Technical Data
Bit 0
Bit 8
Bit 0
93

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