pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 137

• Manufacturer Part Number: pxb4219
• Description: Iwe8 Interworking Element For 8 E1/t1 Lines
• Manufacturer: Infineon Technologies Corporation

6.2
The IWE8 requires an external 64K × 32 bit RAM. A 33th bit is added for parity.
MPADR[17:0]
3FFFF
30000
2FFFF
28000
27FFF
26040
2603F
26020
2601F
26000
25FFF
24000
23FFF
22000
21FFF
20000
Figure 37
6.2.1
Read/write Address 20000
Reset value: Not applicable. RAM must be reset and initialized via SW
Memory size: 4K × 32 bits: 8 ports x 32 channels x 16 counters.
The statistics counters are incremented when the “channel_mode” is active or standby,
and when the corresponding enable bit in the “catm” or “caal” register is set.
RMADR
MPADR
Data Sheet
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
17 16 15 14 13 12 11 10 9
External RAM
Statistics Counters
1
Structure of the IWE8 external RAM
15 14 13 12 11 10 9
0
64k × 16
32k × 16
8128 x 16
32 × 16
32 × 16
8k × 16
8k × 16
8k × 16
0
0
Segmentation / ATM Receive Buffers
Reassembly / ATM Transmit Buffers
H
0
Statistics Counter thresholds
to 21FFF
Cell Extraction Buffer
Cell Insertion Buffer
port_nr
Statistics Counters
[2:0]
Interrupt queue
H
Timers
137
32k × 32
16k × 32
4064 x 32
16 × 32
16 × 32
4k × 32
4k × 32
4k × 32
8
channel_nr[4:0]
7
8
PXB4219 / PXB4220 / PXB4221
6
7
5
6
4
5
counter_nr[3:0] 0
3
4
Memory Structure
RMADR[15:0]
FFFF
8000
7FFF
4000
3FFF
3020
301F
3010
300F
3000
2FFF
2000
1FFF
1000
0FFF
0000
2
3
1
2
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
2002-05-06
0
1
0