pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 145

no-image

pxb4219

Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
For reading the extraction buffer, refer to
MPADR[17:0]
27FFF
26060
2605F
2605A
26059
26042
26041
26040
The format of the ATM header entry is as follows:
6.2.7
Read/write Address 28000
Reset value: Not applicable. RAM must be reset and initialized via SW
Memory size: 16K × 32 bits: 8 ports x 32 channels x 4 cells x 16 doublewords
Data Sheet
31
23
15
7
H
H
H
H
H
H
H
H
GFC[3:0] or VPI[11:8]
Segmentation/ATM Receive Buffers
VCI[3:0]
VPI[3:0]
Cell #254
·
Cell #2
H
to 2FFFF
ATM Cell #1 Payload
ATM Cell #1 Header
Not Used
VCI[11:4]
H
Chapter
145
4.10.
PXB4219 / PXB4220 / PXB4221
PTI[2:0]
VCI[15:12]
VPI[7:4]
Memory Structure
RMADR[15:0]
3FFF
3030
302F
302D
302C
3021
3020
H
H
H
H
H
H
H
2002-05-06
CLP
24
16
8
0

Related parts for pxb4219