pxb4219 Infineon Technologies Corporation, pxb4219 Datasheet - Page 27
pxb4219
Manufacturer Part Number
pxb4219
Description
Iwe8 Interworking Element For 8 E1/t1 Lines
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXB4219.pdf
(290 pages)
- Current page: 27 of 290
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Table 1
Pin No.
C20, B17,
D14, D12,
C10, C8,
C6, A2
E17, C17,
B15, C12,
D10, A7,
B5, C3
L1
2.2.2
Table 2
Pin No.
Y11, W11,
V11, U11,
Y12, W12,
V12, U12
Y13
W10
Data Sheet
UTOPIA Interface
Symbol
RXDAT[7:0]
RXPTY
RXSOC
Symbol
FTMFS[7:0]
FTFRS[7:0]
RFCLK
Generic Framer Interface (73 pins) (cont’d)
UTOPIA Interface (36 pins)
Input (I)
Output (O)
O
PUA
O
PUA
O
PDA
Input (I)
Output (O)
O
PUA
O
PUA
I
27
Function
UTOPIA Receive Data Bus
Byte-wide data driven from PHY to ATM
layer. RxData[7] is the MSB.
UTOPIA Receive Odd Parity Bit
Odd parity for RXDAT[0:7] driven by the
PHY layer.
UTOPIA Receive Start-of-Cell
Active high signal asserted by the PHY layer
when RXDAT[0:7] contains the first valid
byte of a cell.
Function
Framer Transmit Multiframe
Synchronization
Indication that a new multi-/superframe is
available on the transmit side of the framer
interface
Framer Transmit Frame Synchronization
Pulse
Indication that a new frame is available on
the transmit side of the framer interface
Reference Clock
SYM and EC mode: Central framer interface
clock for all framer ports
FAM and GIM: Optional SRTS/ACM
reference or emergency clock for the framer
receive interface in case of clock failure
PXB4219 / PXB4220 / PXB4221
Pin Descriptions
2002-05-06
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