w83637hg Winbond Electronics Corp America, w83637hg Datasheet - Page 104

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w83637hg

Manufacturer Part Number
w83637hg
Description
Winbond Lpc I/o Lpc I/o
Manufacturer
Winbond Electronics Corp America
Datasheet

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W83637HF/HG
After Power-on reset, the value on RTSA# (pin 43) is latched by HEFRAS of CR26. In Compatible
PnP, a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port
address 2Eh or 4Eh). Secondly, an index value (02h, 07h-FFh) must be written to the Extended
Functions Index Register (I/O port address 2Eh or 4Eh same as Extended Functions Enable Register)
to identify which configuration register is to be accessed. The designer can then access the desired
configuration register through the Extended Functions Data Register (I/O port address 2Fh or 4Fh).
After programming of the configuration register is finished, an additional value (AAh) should be written
to EFERs to exit the Extended Function mode to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin
MR = 1). A warm reset will not affect the configuration registers.
8.1.1.2 Extended Functions Enable Registers (EFERs)
After a power-on reset, the W83637HF/HG enters the default operating mode.
Before the
W83637HF/HG enters the extended function mode, a specific value must be programmed into the
Extended Function Enable Register (EFER) so that the extended function register can be accessed.
The Extended Function Enable Registers are write-only registers. On a PC/AT system, their port
addresses are 2Eh or 4Eh (as described in previous section).
8.1.1.3 Extended Function Index Registers (EFIRs), Extended Function Data Registers (EFDRs)
After the extended function mode is entered, the Extended Function Index Register (EFIR) must be
loaded with an index value (02h, 07h-FEh) to access Configuration Register 0 (CR0), Configuration
Register 7 (CR07) to Configuration Register FE (CRFE), and so forth through the Extended Function
Data Register (EFDR).
The EFIRs are write-only registers with port address 2Eh or 4Eh (as
described in section 12.2.1) on PC/AT systems; the EFDRs are read/write registers with port address
2Fh or 4Fh (as described in section 9.2.1) on PC/AT systems.
8.1.2 Configuration Sequence
To program W83637HF/HG configuration registers, the following configuration sequence must be
followed:
(1). Enter the extended function mode
(2). Configure the configuration registers
(3). Exit the extended function mode
8.1.2.1 Enter the extended function mode
To place the chip into the extended function mode, two successive writes of 0x87 must be applied to
Extended Function Enable Registers (EFERs, i.e. 2Eh or 4Eh).
8.1.2.2 Configuration the configuration registers
The chip selects the logical device and activates the desired logical devices through Extended
Function Index Register (EFIR) and Extended Function Data Register (EFDR). EFIR is located at the
same address as EFER, and EFDR is located at address (EFIR+1).
Publication Release Date: March, 2006
- 99 -
Revision 1.6

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