p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 37

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p87lpc778

Manufacturer Part Number
p87lpc778
Description
Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
Manufacturer
NXP Semiconductors
Datasheet

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The value of port pins at reset is determined by the PRHI bit in the UCFG1 register.
Ports may be configured to reset high or low as needed for the application. When port
pins are driven high at reset, they are in quasi-bidirectional mode and therefore do
not source large amounts of current.
Every output on the P87LPC778 may potentially be used as a 20 mA sink LED drive
output. However, there is a maximum total output current for all ports which must not
be exceeded.
All ports pins of the P87LPC778 have slew rate controlled outputs. This is to limit
noise generated by quickly switching output signals. The slew rate is factory set to
approximately 10 ns rise and fall times.
The bits in the P2M1 register that are not used to control configuration of P2.1 and
P2.0 are used for other purposes. These bits can enable Schmitt trigger inputs on
each I/O port, enable toggle outputs from Timer 0 and Timer 1, and enable a clock
output if either the internal RC oscillator or external clock input is being used. The last
two functions are described in
8.10 “Oscillator” on page 39
shown in Tables
Each I/O port of the P87LPC778 may be selected to use TTL level inputs or Schmitt
inputs with hysteresis. A single configuration bit determines this selection for the
entire port. Port pins P1.2, P1.3, and P1.5 always have a Schmitt trigger input.
Table 33:
Not bit addressable; Reset value: 00H
Table 34:
Bit
7
6
5
4
3
2
1, 0
Bit
Symbol
P2M1 - Port 2 mode register 1 (address A4h) bit allocation
P2M1 - Port 2 mode register 1 (address A4h) bit description
P2S
Symbol
P2S
P1S
P0S
ENCLK
ENT1
ENT0
-
7
33
Rev. 01 — 31 March 2004
P1S
and 34.
6
Description
When P2S = 1, this bit enables Schmitt trigger inputs on Port 2.
When P1S = 1, this bit enables Schmitt trigger inputs on Port 1.
When P0S = 1, this bit enables Schmitt trigger inputs on Port 0.
When ENCLK is set and the P87LPC778 is configured to use the
on-chip RC oscillator, a clock output is enabled on the X2 pin
(P2.0). Refer to
When set, the P.7 pin is toggled whenever Timer1 overflows. The
output frequency is therefore one half of the Timer1 overflow rate.
Refer to
When set, the P1.2 pin is toggled whenever Timer0 overflows. The
output frequency is therefore one half of the Timer0 overflow rate.
Refer to
These bits, along with the matching bits in the P2M2 register,
control the output configuration of P2.1 and P2.0 respectively, as
shown in
P0S
respectively. The enable bits for all of these functions are
5
Section 8.14 “Timer/counters” on page 46
Section 8.14 “Timer/counters” on page 46
Section 8.14 “Timer/counters” on page 46
Table
ENCLK
4
32.
Section 8.10 “Oscillator” on page 39
CMOS single-chip 8-bit microcontroller
ENT1
3
ENT0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2
P87LPC778
(P2M1.1)
1
for details.
for details.
for details.
and
(P2M1.0)
Section
0
37 of 79

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