p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 57

• Manufacturer Part Number: p87lpc778
• Description: Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12378
Product data
8.15.11 Multiprocessor communications
8.15.12 Automatic address recognition
are reset and the unit goes back to looking for another 1-to-0 transition. If the start bit
proves valid, it is shifted into the input shift register, and reception of the rest of the
frame will proceed.
As data bits come in from the right, 1s shift out to the left. When the start bit arrives at
the leftmost position in the shift register (which in Modes 2 and 3 is a 9-bit register), it
flags the RX Control block to do one last shift, load SBUF and RB8, and set RI.
The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the
following conditions are met at the time the final shift pulse is generated. 1. RI = 0,
and 2. Either SM2 = 0, or the received 9th data bit = 1.
If either of these conditions is not met, the received frame is irretrievably lost, and RI
is not set. If both conditions are met, the received 9th data bit goes into RB8, and the
first 8 data bits go into SBUF. One bit time later, whether the above conditions were
met or not, the unit goes back to looking for a 1-to-0 transition at the RxD input.
UART modes 2 and 3 have a special provision for multiprocessor communications. In
these modes, 9 data bits are received or transmitted. When data is received, the 9th
bit is stored in RB8. The UART can be programmed such that when the stop bit is
received, the serial port interrupt will be activated only if RB8 = 1. This feature is
enabled by setting bit SM2 in SCON. One way to use this feature in multiprocessor
systems is as follows:
When the master processor wants to transmit a block of data to one of several slaves,
it first sends out an address byte which identifies the target slave. An address byte
differs from a data byte in that the 9th bit is ‘1’ in an address byte and ‘0’ in a data
byte. With SM2 = 1, no slave will be interrupted by a data byte. An address byte,
however, will interrupt all slaves, so that each slave can examine the received byte
and see if it is being addressed. The addressed slave will clear its SM2 bit and
prepare to receive the data bytes that follow. The slaves that weren’t being addressed
leave their SM2 bits set and go on about their business, ignoring the subsequent data
bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the
stop bit, although this is better done with the Framing Error flag. In a Mode 1
reception, if SM2 = 1, the receive interrupt will not be activated unless a valid stop bit
is received.
Automatic Address Recognition is a feature which allows the UART to recognize
certain addresses in the serial bit stream by using hardware to make the
comparisons. This feature saves a great deal of software overhead by eliminating the
need for the software to examine every serial address which passes by the serial
port. This feature is enabled by setting the SM2 bit in SCON. In the 9 bit UART
modes, mode 2 and mode 3, the Receive Interrupt flag (RI) will be automatically set
when the received byte contains either the ‘Given’ address or the ‘Broadcast’
address. The 9 bit mode requires that the 9th information bit is a ‘1’ to indicate that
the received information is an address and not data.
Rev. 01 — 31 March 2004
CMOS single-chip 8-bit microcontroller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P87LPC778
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