p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 47

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p87lpc778

Manufacturer Part Number
p87lpc778
Description
Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
Manufacturer
NXP Semiconductors
Datasheet

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8.14.1 Mode 0
Table 43:
Not bit addressable; Reset value: 00H
Table 44:
Table 45:
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit
Counter with a divide-by-32 prescaler.
In this mode, the Timer register is configured as a 13-bit register. As the count rolls
over from all 1s to all 0s, it sets the Timer interrupt flag TFn. The count input is
enabled to the Timer when TRn = 1 and either GATE = 0 or INTn = 1. (Setting
GATE = 1 allows the Timer to be controlled by external input INTn, to facilitate pulse
width measurements). TRn is a control bit in the Special Function Register TCON
(Tables
The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper
3 bits of TLn are indeterminate and should be ignored. Setting the run flag (TRn)
does not clear the registers.
Mode 0 operation is the same for Timer0 and Timer1. See
different GATE bits, one for Timer1 (TMOD.7) and one for Timer0 (TMOD.3).
Bit
7
6
5, 4
3
2
1, 0
M1, M0
0 0
0 1
1 0
1 1
Bit
Symbol
46
Symbol
GATE
C/T
M1, M0
GATE
C/T
M1, M0
TMOD - Timer/counter mode control register (address 89H) bit allocation
TMOD - Timer/counter mode control register (address 89H) bit description
M1, M0 timer mode
and 47). The GATE bit is in the TMOD register.
GATE
7
Timer mode
8048 Timer ‘TLn’ serves as 5-bit prescaler.
16-bit Timer/Counter ‘THn’ and ‘TLn’ are cascaded; there is no prescaler.
8-bit auto-reload Timer/Counter. THn holds a value which is loaded into
TLn when it overflows.
Timer0 is a dual 8-bit Timer/Counter in this mode. TL0 is an 8-bit
Timer/Counter controlled by the standard Timer0 control bits. TH0 is an
8-bit timer only, controlled by the Timer1 control bits (see text). Timer1 in
this mode is stopped.
Rev. 01 — 31 March 2004
C/T
6
Description
Gating control for Timer1. When set, Timer/Counter is enabled
only while the INT1 pin is high and the TR1 control pin is set.
When cleared, Timer1 is enabled when the TR1 control bit is set.
Timer or Counter Selector for Timer1. Cleared for Timer operation
(input from internal system clock.) Set for Counter operation (input
from T1 input pin).
Mode select for Timer1 (see
Gating control for Timer0. When set, Timer/Counter is enabled
only while the INT0 pin is high and the TR0 control pin is set.
When cleared, Timer0 is enabled when the TR0 control bit is set.
Timer or Counter Selector for Timer0. Cleared for Timer operation
(input from internal system clock.) Set for Counter operation (input
from T0 input pin).
Mode Select for Timer0 (see
M1
5
Figure 19
M0
4
CMOS single-chip 8-bit microcontroller
shows Mode 0 operation.
GATE
Table 45
Table 45
3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
below).
below).
Figure
C/T
P87LPC778
2
19. There are two
M1
1
47 of 79
M0
0

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