p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 63

• Manufacturer Part Number: p87lpc778
• Description: Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12378
Product data
Fig 27. Block diagram of the Watchdog timer.
R/C OSCILLATOR
WDCLK * WDTE
500 kHz
CLOCK OUT
state clock
ENABLE
8.16 Watchdog timer
FEED DETECT
When enabled via the WDTE configuration bit, the Watchdog timer is operated from
an independent, fully on-chip oscillator in order to provide the greatest possible
dependability. When the Watchdog feature is enabled, the timer must be fed regularly
by software in order to prevent it from resetting the CPU, and it cannot be turned off.
When disabled as a Watchdog timer (via the WDTE bit in the UCFG1 configuration
register), it may be used as an interval timer and may generate an interrupt. The
Watchdog timer is shown in
The Watchdog timeout time is selectable from one of eight values, nominal times
range from 16 milliseconds to 2.1 seconds. The frequency tolerance of the
independent Watchdog RC oscillator is 37 %. The timeout selections and other
control bits are shown in Tables
the WDCON register may be written once during chip initialization in order to set the
Watchdog timeout time. The recommended method of initializing the WDCON
register is to first feed the Watchdog, then write to WDCON to configure the WDS[2:0]
bits. Using this method, the Watchdog initialization may be done any time within 10
milliseconds after start-up without a Watchdog overflow occurring before the
initialization can be completed.
Since the Watchdog timer oscillator is fully on-chip and independent of any external
oscillator circuit used by the CPU, it intrinsically serves as an oscillator fail detection
function. If the Watchdog feature is enabled and the CPU oscillator fails for any
reason, the Watchdog timer will time out and reset the CPU.
When the Watchdog function is enabled, the timer is deactivated temporarily when a
chip reset occurs from another source, such as a Power-on reset, brownout reset, or
external reset.
WATCHDOG
WDTE + WDRUN
BOD (xxx.x)
POR (xxx.x)
Rev. 01 — 31 March 2004
(WDCON.2-0)
WDS2-0
CLEAR
20-BIT COUNTER
Figure
55
8 TO 1 MUX
27.
and 56. When the Watchdog function is enabled,
8 MSBs
CMOS single-chip 8-bit microcontroller
R
S
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Q
WDTE (UCFG1.7)
(WDCON.5)
P87LPC778
WDOVF
watchdog
watchdog
interrupt
reset
002aaa645
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