km416rd8ac Samsung Semiconductor, Inc., km416rd8ac Datasheet - Page 36

• Manufacturer Part Number: km416rd8ac
• Description: 128/144mbit Rdram 256k X 16/18 Bit X 2*16 Dependent Banks Direct Rdramtm
• Manufacturer: Samsung Semiconductor, Inc.

KM416RD8AC(D)/KM418RD8AC(D)
Read/write register.
Reset value of TEST34 is zero (from SIO Reset)
This register are used for testing purposes. It must not
be read or written after SIO Reset.
15 14 13 12 11 10 9
15 14 13 12 11 10 9
0
Control Register: CNFGB
Control Register: TEST34
0
SVER5..0
= 00000
0
0
Figure 30: TEST Register
0
0
0
8
8
0
CORG4..0
= 00100
7
7
0
6
6
0
5
5
0
SPT
Address: 022
4
1
4
0
Address: 024
DEVTYP2..0
3
3
0
SPT - Split-core. SPT=1 means the core is split, SPT=0 means it is not.
CORG4..0 - Core organization. This field specifies the number of bank
(5 bits), row (9 bits), and column (6 bits) address bits.
SVER5..0 - Stepping version. Specifies the mask version number of this
device.
= 000
Figure 29: CNFGB Register
2
2
0
1
1
0
BYT
16
0
B
0
0
16
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. .
Read-only register.
BYT - Byte width. B=1 means the device reads and
writes 9-bit memory bytes. B=0 means 8 bits.
DEVTYP2..0 - Device type. DEVTYP = 000 means
that this device is an RDRAM.
Read/write register.
Reset value is undefined.
Device Identification register.
DEVID4..DEVID0 is compared to DR4..DR0,
DC4..DC0, and DX4..DX0 fields for all memory read
or write transactions. This determines which RDRAM
is selected for the memory read or write transaction.
15 14 13 12 11 10 9
0
Control Register: DEVID
0
0
0
Figure 31: DEVID Register
0
0
0
8
0
Rev. 1.01 Oct. 1999
Direct RDRAM
7
0
6
0
5
0
Address: 040
4
DEVID4..DEVID0
3
2
1
16
0
™