ak5367a AKM Semiconductor, Inc., ak5367a Datasheet - Page 15

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ak5367a

Manufacturer Part Number
ak5367a
Description
96khz 24-bit ?? Adc With 0v Bias Selector
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Two kinds of data formats can be chosen with the DIF bit (
compliment format. The SDTO is clocked out on the falling edge of BICK. The audio interface supports both master and
slave modes. In master mode, BICK and LRCK are output with the BICK frequency fixed to 64fs and the LRCK
frequency fixed to 1fs.
The AK5367A becomes slave mode when it is in the power-down mode (PDN pin = “L”) or exiting power-down. After
exiting the power-down mode, master mode should be set by CKS2-0 bits.
In master mode, LRCK and BICK pins are floating until CKS2-0 bits fixed. Therefore BICK and LRCK pins must be
connected with 100 kΩ pull-up or pull-down resistance.
MS0967-E-00
Audio Interface Format
Master Mode and Slave Mode
LRCK
BICK(64fs)
SDTO(o)
Mode
LRCK
BICK(64fs)
SDTO(o)
0
1
DIF bit
0
1
0
0
23 22
24bit, I
23:MSB, 0:LSB
24bit, MSB justified
1 2
1 2
23 22
23:MSB, 0:LSB
2
SDTO
S Compatible
3
4
20 21
4
Lch Data
3 2 1
21
Lch Data
Table 3. Audio Interface Format
3 2 1
22 23
22 23
Figure 8. Mode 0 Timing
Figure 9. Mode 1 Timing
LRCK
H/L
L/H
0
24
24
0
25
- 15 -
≥ 48fs or 32fs
≥ 48fs or 32fs
BICK(Slave)
Table 3
31 0 1 2
0 1 2
23 22
). In both modes, the serial data is in MSB first, 2’s
23 22
BICK(Master)
4
64fs
64fs
20 21
Rch Data
4
3
21
Rch Data
3
2
22
22
2
1
23
23
1
Figure 8
Figure 9
0
Figure
24
24
0
25
31
(default)
[AK5367A]
0
0
23
2008/05
1
1

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