ak5367a AKM Semiconductor, Inc., ak5367a Datasheet - Page 17

• Manufacturer Part Number: ak5367a
• Description: 96khz 24-bit ?? Adc With 0v Bias Selector
• Manufacturer: AKM Semiconductor, Inc.

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The AK5367A must be reset once by bringing the PDN pin “L” after power-up. At the slave mode, the internal timing
starts clocking by the rising edge (falling edge at Mode 1) of LRCK after exiting from reset and power down state by
MCLK. The AK5367A is in power-down states until the LRCK is input. At master mode, bringing the PDN pin “H” and
exiting from reset and power down state by MCLK input.
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Soft mute operation is performed in the digital domain of the ADC output. When SMUTE bit goes “1”, the ADC output
data is attenuated to −∞ within 1024 LRCK cycles. When the SMUTE bit returned “0”, the mute is cancelled and the
output attenuation gradually changes to 0dB within 1024 LRCK cycles. If the soft mute is cancelled before mute state
after starting of the operation, the attenuation is discontinued and returned to 0dB. The soft mute is effective for changing
the signal source without stopping the signal transmission.
Notes:
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The AK5367A includes 4ch stereo input selectors. The input selector is 4 to 1 selector and set by SEL2-0 bits
Note: The LOUT, ROUT pin are 0V.
MS0967-E-00
(1) The output signal is attenuated by −∞ within 1024 LRCK cycles (1024/fs).
(2) If the soft mute is cancelled before the mute, the attenuation is discontinued and returned to 0dB by the same cycle.
System Reset
Soft Mute Operation
Input Selector
SM U T E bit
Attenuation
SD T O O utput D ata
SEL2 bit
0dB
0
0
0
0
1
-∞
SEL1 bit
1024/fs
0
0
1
1
0
(1)
Figure 11. Soft Mute Function
Table 4. Input Selector
SEL0 bit
“0” data
0
1
0
1
0
- 17 -
All off (Note)
Input Selector
LIN1 / RIN1
LIN2 / RIN2
LIN3 / RIN3
LIN4 / RIN4
1024/fs
(default)
(2)
[AK5367A]
(Table
2008/05
4).