ak5367a AKM Semiconductor, Inc., ak5367a Datasheet - Page 22

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ak5367a

Manufacturer Part Number
ak5367a
Description
96khz 24-bit ?? Adc With 0v Bias Selector
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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2. READ Operations
Set the R/W bit = “1” for the READ operation of the AK5367A. The master can read the next address’s data by generating
an acknowledge instead of terminating the write cycle after the receipt of the first data word. After receiving each data
packet the internal 2-bit address counter is incremented by one, and the next data is automatically taken into the next
address. If the address exceeds 02H prior to generating a stop condition, the address counter will “roll over” to 00H and
the previous data will be overwritten.
The AK5367A supports two basic read operations: CURRENT ADDRESS READ and RANDOM ADDRESS READ.
2-1. CURRENT ADDRESS READ
The AK5367A contains an internal address counter that maintains the address of the last word accessed, incremented by
one. Therefore, if the last access (either a read or write) were to address “n”, the next CURRENT READ operation would
access data from the address “n+1”. After receipt of the slave address with R/W bit set to “1”, the AK5367A generates an
acknowledge, transmits 1-byte of data to the address set by the internal address counter and increments the internal
address counter by 1. If the master does not generate an acknowledge but generates a stop condition, the AK5367A ceases
transmission.
2-2. RANDOM ADDRESS READ
The random read operation allows the master to access any memory location at random. Prior to issuing the slave address
with the R/W bit “1”, the master must first perform a “dummy” write operation. The master issues start request, a slave
address (R/W bit = “0”) and then the register address to read. After the register address is acknowledged, the master
immediately reissues start request and the slave address with the R/W bit “1”. The AK5367A then generates an
acknowledge, 1 byte of data and increments the internal address counter by 1. If the master does not generate an
acknowledge but generates stop condition, the AK5367A ceases transmission.
MS0967-E-00
SDA
SDA
R
S
T
A
T
S
Slave
Address
R
S
T
A
T
S
R/W="0"
Slave
Address
C
A
K
R/W="1"
Sub
Address(n)
C
A
K
Data(n)
Figure 19. CURRENT ADDRESS READ
Figure 20. RANDOM ADDRESS READ
C
A
K
R
S
T
A
T
S
Slave
Address
A
C
K
R/W="1"
Data(n+1)
A
C
K
- 22 -
Data(n)
C
A
K
Data(n+2)
C
A
K
Data(n+1)
A
C
K
C
A
K
C
A
K
Data(n+x)
A
C
K
Data(n+x)
A
C
K
O
S
P
P
T
[AK5367A]
A
C
K
O
2008/05
S
T
P
P

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