wm8770 Wolfson Microelectronics plc, wm8770 Datasheet - Page 19

• Manufacturer Part Number: wm8770
• Description: 24-bit, 192khz 8-channel Codec With Volume Control
• Manufacturer: Wolfson Microelectronics plc

Production Data
ZERO DETECT
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Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and MCLK
frequencies.
Table 8 Master Mode ADC/DACLRC Frequency Selection
BCLK is also generated by the WM8770. The frequency of BCLK depends on the mode of operation.
In 128/192fs modes (DACRATE=000 or 001) BCLK = MCLK/2. In 256/384/512fs modes
(ADCRATE/DACRATE=010 or 011 or 100) BCLK = MCLK/4. However if DSP mode is selected as
the audio interface mode then BCLK=MCLK. This is to ensure that there are sufficient BCLKs to
clock in all eight channels. Note that DSP mode cannot be used in 128fs mode for word lengths
greater than 16 bits or in 192fs mode for word lengths greater than 24 bits.
The WM8770 has a zero detect circuit for each DAC channel which detects when 1024 consecutive
zero samples have been input. Two zero flag outputs (ZFLAG1 and ZFLAG2) may be programmed to
output the zero detect signals (see Table 9) which may then be used to control external muting
circuits. A ‘1’ on ZFLAG1 or ZFLAG2 indicates a zero detect. When a DAC is powered down
ZFLAG1 and ZFLAG2 will go high by default if the Zero Detect is selected for that DAC. When this
DAC is powered off, the Bypass path is selected and there is an external mute circuit controlled by
ZFLAG1 or ZFLAG2, the Zero Detect feature should be de-selected or the output will be muted.
The zero detect may also be used to automatically enable the PGA mute by setting IZD. The zero
flag output may be disabled by setting DZFM to 0000. The zero flag signal for a DAC channel will
only be enabled if that channel is enabled as an input to the output summing stage.
Table 9 Zero Flag Output Select
SAMPLING
DZFM[3:0]
(DACLRC/
ADCLRC)
44.1kHz
192kHz
32kHz
48kHz
96kHz
RATE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Zero flag disabled
All channels zero
Left channels zero
Channel 1 zero
Channel 1 zero
Channel 1 zero
Channel 1 zero
Channel 2 zero
Channel 2 zero
Channel 3 zero
Channels 1-3 zero
Channel 1 zero
Channel 1 left zero
Channel 2 left zero
Channel 3 left zero
Channel 4 left zero
DACRATE
5.6448
12.288
24.576
4.096
6.144
128fs
=000
ZFLAG1
DACRATE
18.432
36.864
6.144
8.467
9.216
192fs
=001
Zero flag disabled
All channels zero
Right channels zero
Channels 2-4 zero
Channel 2 zero
Channel 3 zero
Channel 4 zero
Channel 3 zero
Channel 4 zero
Channel 4 zero
Channel 4 zero
Channels 2 & 3 zero
Channel 1 right zero
Channel 2 right zero
Channel 3 right zero
Channel 4 right zero
System Clock Frequency (MHz)
Unavailable Unavailable Unavailable Unavailable
ADCRATE/
DACRATE
11.2896
ZFLAG2
12.288
24.576
8.192
256fs
=010
ADCRATE/
DACRATE
16.9340
12.288
18.432
36.864
384fs
=011
Unavailable Unavailable
ADCRATE/
DACRATE
22.5792
16.384
24.576
512fs
=100
PD Rev 4.2 March 2008
ADCRATE/
DACRATE
WM8770
33.8688
24.576
36.864
768fs
=101
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