wm8770 Wolfson Microelectronics plc, wm8770 Datasheet - Page 41

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wm8770

Manufacturer Part Number
wm8770
Description
24-bit, 192khz 8-channel Codec With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet

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Production Data
w
01110
Digital
Attenuation
DACR3
01111
Digital
Attenuation
DACL4
10000
Digital
Attenuation
DACR4
10001
Master
Digital
Attenuation
(all channels)
10010
Phase swaps
10011
DAC Control
REGISTER
ADDRESS
BIT
7:0
7:0
7:0
7:0
7:0
7:4
8
8
8
8
0
2
3
1
MASTDA[7:0]
RDA3[7:0]
RDA4[7:0]
LDA4[7:0]
UPDATE
UPDATE
UPDATE
UPDATE
PHASE
DZCEN
LABEL
PL[3:0]
TOD
ATC
IZD
Not latched
Not latched
Not latched
Not latched
DEFAULT
11111111
11111111
11111111
11111111
00000000
(0dB)
(0dB)
(0dB)
(0dB)
1001
0
0
0
0
Digital Attenuation Data for Right channel DACR3 in 0.5dB steps.
See Table 12
Controls simultaneous update of all Attenuation Latches
Digital Attenuation Data for Left Channel DACL4 in 0.5dB steps.
See Table 12
Controls simultaneous update of all Attenuation Latches
Digital Attenuation Data for Right Channel DACR4 in 0.5dB steps.
See Table 12
Controls simultaneous update of all Attenuation Latches
Digital Attenuation Data for all DAC Channels in 0.5dB steps. See
Table 12
Controls simultaneous update of all Attenuation Latches
Controls Phase of DAC Outputs
DAC Digital Volume Zero Cross Enable:
Attenuator Control
Infinite Zero Detection Circuit Control and Automute Control
DAC Analogue Zero Cross Detect Timeout Disable
DAC Output Control
PL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
0: All DACs use attenuations as programmed.
1: Right channel DACs use corresponding left DAC
attenuations
0: Infinite zero detect automute disabled
0: Store RDA3 in intermediate latch (no change to output)
1: Store RDA3 and update attenuation on all channels.
0: Store LDA4 in intermediate latch (no change to output)
1: Store LDA4 and update attenuation on all channels.
0: Store RDA4 in intermediate latch (no change to output)
1: Store RDA4 and update attenuation on all channels.
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
0: Sets non inverted output phase
1: inverts phase of DAC output
1: Infinite zero detect automute enabled
0: Zero Cross detect disabled
1: Zero Cross detect enabled
0 : Timeout enabled
1: Timeout disabled
Left
Output
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Right
Output
Mute
Mute
Mute
Mute
Left
Left
Left
Left
DESCRIPTION
PL[3:0]
1000
1001
1010
1011
1100
1101
1110
1111
PD Rev 4.2 March 2008
Left
Output
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
WM8770
Right
Right
Output
Right
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
41

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