wm8770 Wolfson Microelectronics plc, wm8770 Datasheet - Page 22

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wm8770

Manufacturer Part Number
wm8770
Description
24-bit, 192khz 8-channel Codec With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet

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WM8770
w
DIN1/2/3/4/
DIN1/2/3/4/
LEFT JUSTIFIED MODE
In left justified mode, the MSB of DIN1/2/3/4 is sampled by the WM8770 on the first rising edge of
BCLK following a DACLRC transition. The MSB of the ADC data is output on DOUT and changes on
the same falling edge of BCLK as ADCLRC and may be sampled on the rising edge of BCLK.
ADCLRC and DACLRC are high during the left samples and low during the right samples (Figure 14).
Figure 14 Left Justified Mode Timing Diagram
RIGHT JUSTIFIED MODE
In right justified mode, the LSB of DIN1/2/3/4 is sampled by the WM8770 on the rising edge of BCLK
preceding a DACLRC transition. The LSB of the ADC data is output on DOUT and changes on the
falling edge of BCLK preceding a ADCLRC transition and may be sampled on the rising edge of
BCLK. ADCLRC and DACLRC are high during the left samples and low during the right samples
(Figure 15).
Figure 15 Right Justified Mode Timing Diagram
I
In I
following a DACLRC transition. The MSB of the ADC data is output on DOUT and changes on the
first falling edge of BCLK following an ADCLRC transition and may be sampled on the rising edge of
BCLK. ADCLRC and DACLRC are low during the left samples and high during the right samples.
Figure 16 I
2
DACLRC/
DACLRC/
ADCLRC
DACLRC/
DIN1/2/3/4/
ADCLRC
DOUT
ADCLRC
DOUT
S MODE
DOUT
BCLK
2
BCLK
BCLK
S mode, the MSB of DIN1/2/3/4 is sampled by the WM8770 on the second rising edge of BCLK
2
S Mode Timing Diagram
MSB
1
MSB
2
1 BCLK
1
3
2
MSB
1
3
LEFT CHANNEL
LEFT CHANNEL
LEFT CHANNEL
2
3
n-2 n-1
n-2 n-1
n
LSB
n-2 n-1
n
LSB
n
LSB
MSB
1/fs
1/fs
1/fs
1
MSB
1 BCLK
2
1
3
MSB
2
1
3
RIGHT CHANNEL
RIGHT CHANNEL
RIGHT CHANNEL
2
3
n-2 n-1
PD Rev 4.2 March 2008
n-2 n-1
n
LSB
n-2 n-1
n
LSB
Production Data
n
LSB
22

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