wm8770 Wolfson Microelectronics plc, wm8770 Datasheet - Page 30

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wm8770

Manufacturer Part Number
wm8770
Description
24-bit, 192khz 8-channel Codec With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet

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WM8770
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INFINITE ZERO DETECT ENABLE
Setting the IZD register bit will enable the internal infinite zero detect function:
With IZD enabled, applying 1024 consecutive zero input samples to all 8 DAC channels will cause all
DAC outputs to be muted. Mute will be removed as soon as any channel receives a non-zero input.
ZERO FLAG OUTPUT
The DZFM control bits allow the selection of the eight DAC channel zero flag bits for output on the
ZFLAG1 and ZFLAG2 pins. A ‘1’ on ZFLAG1 or ZFLAG2 indicates 1024 consecutive zero input
samples to the channels selected.
DAC OUTPUT CONTROL
The DAC output control word determines how the left and right inputs to the audio Interface are
applied to the left and right DACs:
10011
DAC Channel Control
10101
Zero Flag Select
10011
DAC Control
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
BIT
BIT
7:4
BIT
7:4
2
DZFM[3:0]
LABEL
PL[3:0]
LABEL
LABEL
IZD
DEFAULT
DEFAULT
DEFAULT
1001
0000
0
PL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Infinite zero Mute Enable
0 : disable inifinite zero mute
1: enable infinite zero Mute
Selects the ouput for ZFLAG1
and ZFLAG2 pins (see Table 9).
A ‘1’ indicates 1024 consecutive
zero input samples on the
channels selected.
DESCRIPTION
DESCRIPTION
DESCRIPTION
Left
Output
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
PD Rev 4.2 March 2008
Production Data
Right
Output
Mute
Mute
Mute
Mute
Left
Left
Left
Left
Right
Right
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
30

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