ppc405exr Applied Micro Circuits Corporation (AMCC), ppc405exr Datasheet - Page 42

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ppc405exr

Manufacturer Part Number
ppc405exr
Description
Powerpc 405exr Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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PPC405EXr – PowerPC 405EXr Embedded Processor
Table 7. Signal Functional Description (Sheet 2 of 7)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 39 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 39 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
42
PCI Express Interface
PCIE0ATB
PCIE0ClkC
PCIE0ClkT
PCIE0RExt
PCIEnRExtG
PCIE0Rx
PCIE0Rx
PCIE0Tx
PCIE0Tx
Interrupts Interface
IRQ0:2
IRQ3:5
IRQ6
IRQ7:9
JTAG Interface
TCK
TDI
TDO
TMS
TRST
Signal Name
Analog Test Bus for manufacturing test.
Differential input for external reference clock.
External reference resistor. Attach a 1.37 kΩ, 1% resistor between
RExt and RExtG to provide the reference for both the bias currents
and the impedance calibration circuitry.
Differential receiver for received serial data.
Note: Input must be DC coupled and biased to 0V common mode.
Differential driver for transmitted serial data.
Note: Output must be AC coupled.
External interrupt requests.
External interrupt requests.
External interrupt requests.
External interrupt requests.
Test clock.
Test data in.
Test data out.
Test mode select.
Test reset. Must be low during power-on reset to initialize the JTAG
controller and for normal operation of the chip.
Description
Preliminary Data Sheet
I/O
na
na
O
O
I
I
I
I
I
I
I
I
I
I
Revision 1.10 - July 10, 2008
LVDS receiver
LVDS driver
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
w/pull-up
w/pull-up
w/pull-up
Analog
Analog
Type
CML
AMCC Proprietary
Notes
1, 4
1, 5
5
1
1
1
1

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