ppc405exr Applied Micro Circuits Corporation (AMCC), ppc405exr Datasheet - Page 67

• Manufacturer Part Number: ppc405exr
• Description: Powerpc 405exr Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

PPC405EXr – PowerPC 405EXr Embedded Processor
Figure 10. DDR SDRAM Read Data Path for a Single Data Bit
DDR SDRAM Read Cycle Timing
The following diagram illustrates the relationship of the signals involved with a DDR read operation.
AMCC Proprietary
x8 bits ECC)
ECC bits)
MemData
(x32 bits +
(x4 + x1
DQS
MemFBR
Ext FeedBack
Signals
MemFBD
Package
pins
Programmed
Rec
Read DQS
ECC detection and correction if enabled occurs after Stage 3 before completing the read on the PLB.
Delay
Driver
0
Mux
Mux
Feedback
Data Capture
Window
1
Coarse Delay
Fine Delay
2
3
Stage 1
FF
FF
DQS Falling
Edge Sync
DQS Rising
Edge Sync
DQS aligned
feedback signal
0
2
1
3
Mux
On-time sample clock
Mux
DDR 1X Clock
D
D
DDR 1X Clock
DDR 1X Clock
FeedBack
Signal Gen
Stage 2
Stage 2 Store
Cycles
Delay
FF
FF
FF
FF
T1 T2 T3 T4
C
C
Q2_Ovs
Q2
Q2
+1
CAS Lat Delay
(x64+ECC)
(x64+ECC)
Compare
Adjust
Oversampling
(Guard Band)
Fine Delay
Read FIFO
Upper
Lower
Read Start
Preliminary Data Sheet
Oversampling
Clock
Read Latency adjust circuit
Revision 1.10 - July 10, 2008
PLB 1X Clock
Stage 3
FF
FF
Q3
Q3
FF: Flip-Flop
PLB bus
[0:63]
PLB bus
[64:127]
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