ppc405exr Applied Micro Circuits Corporation (AMCC), ppc405exr Datasheet - Page 64

• Manufacturer Part Number: ppc405exr
• Description: Powerpc 405exr Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

PPC405EXr – PowerPC 405EXr Embedded Processor
The following diagram illustrates the relationship among the signals involved with a DDR write operation.
Figure 9. DDR SDRAM Write Cycle Timing
Note: The timing data in the following tables is based on simulation runs using Einstimer.
Table 24. I/O Timing—DDR SDRAM T
Notes:
1. All of the DQS signals are referenced to MemClkOut0 with the DQS delay line programmed to 1 cycle.
2. Clock speed is 200MHz.
64
DQS0
DQS1
DQS2
DQS3
DQS4
Signal Name
MemClkOut0
T
T
T
T
T
SA
SD
HD
HA
DS
MemData
PLB Clk
= Setup time for address and command signals to MemClkOut0
= Setup time for data signals (minimum time data is valid before rising/falling edge of DSQ)
= Hold time for data signals (minimum time data is valid after rising/falling edge of DSQ)
= Hold time for address and command signals from MemClkOut0
= Delay from rising/falling edge of clock to the rising/falling edge of DQS
DQS
Addr/Cmd
DS
T
SA
T
HA
Minimum
T
4
4
4
4
4
T
SD
DS
T
HD
T
DS
T
DS
(ns)
T
SD
Preliminary Data Sheet
T
HD
Revision 1.10 - July 10, 2008
Maximum
6
6
6
6
6
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