ppc405exr Applied Micro Circuits Corporation (AMCC), ppc405exr Datasheet - Page 70

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ppc405exr

Manufacturer Part Number
ppc405exr
Description
Powerpc 405exr Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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PPC405EXr – PowerPC 405EXr Embedded Processor
PCI Express (PCI-E) I/O Specifications
The following tables provide the required I/O timing information regarding the use of the PCI Express interface on
this chip.
Table 28. PCI-E Receiver I/O Specifications
Table 29. PCI-E Reference Clock I/O Specifications
70
Unit Interval (UI)
Differential Rx peak-peak voltage
Receiver eye time opening
Maximum time delta between median and deviation from median
Rx differential return loss
Common mode Rx return loss
Receiver DC common mode impedance
DC differential impedance
Rx AC common mode voltage
DC Input CM input impedance during reset or power down
Electrical idle detect threshold
PCI_E reference clock frequency (PCIEnClkC and PCIEnClkT )
Accuracy
Duty cycle
Peak-to-peak jitter for 1E-6 BER (1 x 10
Spread Spectrum Clock (SSC) frequency
Common mode voltage
Differential signal amplitude
Notes:
1. The PCI-E reference clock frequency specification does not include +/- 300ppm accuracy specification.
2. The data rate can be modulated from +0.5% to −0.5% of the nominal data rate frequency, at a modulation rate in the range not
3. 1E-6 is the probability that the jitter is greater than 86ps peak-to-peak.
exceeding 30kHz–33kHz. The +/- 600ppm requirement remains which requires the two communcicating ports to be modulated so that
they never exceed a total of 600ppm difference. For most implementations, this requires that both ports have the same bit rate clock
source when the data is modulated with an SSC.
Parameter
Parameter
-6
bit error rate)
Minimum
Minimum
399.88
-300
175
200
100
200
0.4
10
40
80
65
45
30
6
0
-
-
-
Preliminary Data Sheet
Maximum
Maximum
400.12
1200
+300
1600
1600
120
150
125
100
0.3
60
55
86
33
Revision 1.10 - July 10, 2008
-
-
-
-
Units
Units
MHz
ppm
kHz
mV
mV
mV
mV
dB
dB
ps
UI
UI
ns
ps
%
AMCC Proprietary
Ω
Ω
Notes
Notes
1
3
2

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