s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 160

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

THUMB INSTRUCTION SET
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-6. The instruction cycle times
for the THUMB instruction are identical to that of the equivalent ARM instruction.
THE BX INSTRUCTION
BX performs a Branch to a routine whose start address is specified in a Lo or Hi register.
Bit 0 of the address determines the processor state on entry to the routine:
Bit 0 = 0
Bit 0 = 1
4-14
Op
01
10
10
10
11
11
The action of H1 = 1 for this instruction is undefined, and should not be used.
H1
1
0
1
1
0
0
Causes the processor to enter ARM state.
Causes the processor to enter THUMB state.
H2
1
1
0
1
0
1
CMP Hd, Hs
MOV Rd, Hs
MOV Hd, Rs
MOV Hd, Hs
BX Rs
BX Hs
Table 4-6. Summary of Format 5 Instructions (Continued)
THUMB assembler
CMP Hd, Hs
MOV Rd, Hs
MOV Hd, Rs
MOV Hd, Hs
BX Rs
BX Hs
ARM equivalent
NOTE
Compare two registers in the range
8-15. Set the condition code flags on
the result.
Move a value from a register in the
range 8-15 to a register in the range 0-
7.
Move a value from a register in the
range 0-7 to a register in the range
8-15.
Move a value between two registers in
the range 8-15.
Perform branch (plus optional state
change) to address in a register in the
range 0-7.
Perform branch (plus optional state
change) to address in a register in the
range 8-15.
Action
S3C2410A