s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 161

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
EXAMPLES
Hi-Register Operations
Branch and Exchange
USING R15 AS AN OPERAND
If R15 is used as an operand, the value will be the address of the instruction + 4 with bit 0 cleared. Executing a BX
PC in THUMB state from a non-word aligned address will result in unpredictable execution.
ADD
CMP
MOV
ADR
MOV
BX
ALIGN
CODE32
outofTHUMB
PC, R5
R4, R12
R15, R14
R1,outofTHUMB
R11,R1
R11
; PC := PC + R5 but don't set the condition codes.
; Set the condition codes on the result of R4 - R12.
; Move R14 (LR) into R15 (PC)
; but don't set the condition codes,
; eg. return from subroutine.
; Switch from THUMB to ARM state.
; Load address of outofTHUMB into R1.
; Transfer the contents of R11 into the PC.
; Bit 0 of R11 determines whether
; ARM or THUMB state is entered, ie. ARM state here.
; Now processing ARM instructions...
THUMB INSTRUCTION SET
4-15