s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 471

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
IIS-BUS INTERFACE SPECIAL REGISTERS
IIS CONTROL (IISCON) REGISTER
NOTES:
1.
2.
Serial clock frequency (IISCLK)
@CODECLK = 256fs
@CODECLK = 384fs
IISCON
Left/Right channel index
(Read only)
Transmit FIFO ready flag
(Read only)
Receive FIFO ready flag
(Read only)
Transmit DMA service request
Receive DMA service request
Transmit channel idle command
Receive channel idle command
IIS prescaler
IIS interface
Register
The IISCON register is accessible for each byte, halfword and word unit using STRB/STRH/STR and LDRB/LDRH/LDR
instructions or char/short int/int type pointer in Little/Big endian mode.
(Li/HW/W): Little/HalfWord/Word
(Bi/HW/W): Big/HalfWord/Word
Serial bit per channel
IISCON
0x55000000 (Li/HW, Li/W, Bi/W)
0x55000002 (Bi/HW)
Table 21-2 Usable Serial Bit Clock Frequency (IISCLK = 16 or 32 or 48fs)
Address
Bit
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0 = Left
1 = Right
0 = empty
1 = not empty
0 = full
1 = not full
0 = Disable
1 = Enable
0 = Disable
1 = Enable
In Idle state the IISLRCK is inactive (Pause Tx).
0 = Not idle
1 = Idle
In Idle state the IISLRCK is inactive (Pause Rx).
0 = Not idle
1 = Idle
0 = Disable
1 = Enable
0 = Disable (stop)
1 = Enable (start)
16fs, 32fs, 48fs
R/W
R/W
16fs, 32fs
8-bit
IIS control register
Description
Description
32fs, 48fs
16-bit
32fs
IIS-BUS INTERFACE
Reset Value
Initial State
0x100
1
0
0
0
0
0
0
0
0
21-5