s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 573

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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ARM920T PROCESSOR
FAULT CHECKING SEQUENCE
The sequence by which the MMU checks for access faults is different for sections and pages. The sequence for both
types of access is shown below. The conditions that generate each of the faults are described on the following
pages.
permission
translation
Section
Section
domain
Section
fault
fault
fault
No access(00)
Reserved(10)
Violation
Invalid
Figure 3-11. Sequence for Checking Faults
Check access
permissions
Client(01)
Section
Section
Modified virtual address
Check address alignment
Get level one descriptor
Check domain status
Physical address
Manager(11)
Check access
permissions
table entry
Client(01)
Get page
Page
Page
No access(00)
Reserved(10)
Misaligned
Violation
Invalid
permission
translation
Alignment
domain
Page
Page
Page
fault
fault
fault
fault
MMU
3-21

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