vt82c586a ETC-unknow, vt82c586a Datasheet - Page 37

• Manufacturer Part Number: vt82c586a
• Description: Integrated Peripheral Controller
• Manufacturer: ETC-unknow

IDE-Controller-Specific Confiiguration Registers
Offset 40 - Chip Enable ..................................................... RW
Offset 41 - IDE Configuration .......................................... RW
Offset 42 - Reserved (Do Not Program) .......................... RW
Offset 43 - FIFO Configuration ....................................... RW
Preliminary Revision 0.1 October 13, 1996
7-2
6-5
3-2
1-0
1
0
7
6
5
4
3
2
1
0
7
4
Reserved
Primary Channel Enable........ default = 0 (disabled)
Secondary Channel Enable .... default = 0 (disabled)
Primary IDE Read Prefetch Buffer
Primary IDE Post Write Buffer
Secondary IDE Read Prefetch Buffer
Secondary IDE Post Write Buffer
Reserved (read write) .......do not change, default=0
Reserved (read write) .......do not change, default=1
Reserved (read write) .......do not change, default=1
Reserved (read write) .......do not change, default=0
Reserved
FIFO Configuration Between the Two Channels
Reserved
Threshold for Primary Channel
Threshold for Secondary Channel

00
01
10
11
00 1
01 3/4
10 1/2
11 1/4
00 1
01 3/4
10 1/2
11 1/4
0
1
0
1
0
1
0
1
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Disable ...................................................default
Enable
Primary Secondary
16
8
8
0
..................................................(default)
..................................................(default)
............................ always reads 000001b
........................................ always reads 0
........................................ always reads 1
16
0
8...................................(default)
8
-31-
Offset 44 - Miscellaneous Control 1 ................................ RW
Offset 45 - Miscellaneous Control 2 ................................ RW
Offset 46 - Miscellaneous Control 3 ................................ RW
2-0
5-0
3-2
1-0
7
6
5
4
3
7
6
7
6
5
4
Reserved
Master Read Cycle IRDY# Wait States
Master Write Cycle IRDY# Wait States
FIFO Output Data 1/2 Clock Advance
Bus Master IDE Status Register Read Retry
Retry bus master IDE status register read when
master write operation for DMA read is not complete
Reserved
Reserved
Interrupt Steering Swap
Reserved
Primary Channel Read DMA FIFO Flush
1 = Enable FIFO flush for read DMA when interrupt
asserts primary channel. ...............default=1 (enabled)
Secondary Channel Read DMA FIFO Flush
1 = Enable FIFO flush for Read DMA when interrupt
asserts secondary channel............ Default=1 (enabled)
Primary Channel End-of-Sector FIFO Flush
1 = Enable FIFO flush at the end of each sector for
the primary channel. ................... Default=0 (disabled)
Secondary Channel End-of-Sector FIFO Flush
1 = Enable FIFO flush at the end of each sector for
the secondary channel................. Default=0 (disabled)
Reserved
Max DRDY Pulse Width
Maximum DRDY# pulse width after the cycle count.
Command will deassert in spite of DRDY# status to
avoid system ready hang.
00 No limitation.......................................... default
01 64 PCI clocks
10 128 PCI clocks
11 192 PCI clocks
0
1
0
1
0
1
0
1
0
1
0 wait states
1 wait state ............................................. default
0 wait states
1 wait state ............................................. default
Disabled................................................. default
Enabled
Disabled
Enabled .................................................. default
Don’t swap channel interrupts ............... default
Swap interrupts between the two channels
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
Register Descriptions
VT82C586A