vt82c586a ETC-unknow, vt82c586a Datasheet - Page 41

• Manufacturer Part Number: vt82c586a
• Description: Integrated Peripheral Controller
• Manufacturer: ETC-unknow

USB-Specific Configuration Registers
Offset 40 - Miscellaneous Control 1 ................................. RW
Offset 41 - Miscellaneous Control 2 ................................. RW
Offset 60 - Serial Bus Release Number ............................. RO
Offset C1-C0 - Legacy Support ......................................... RO
Preliminary Revision 0.1 October 13, 1996
15-0 UHCI v1.1 Compliant ................ always reads 2000h
7-3
7-0
7
6
5
4
3
2
1
0
2
1
0
PCI Memory Command Option
Babble Option
PCI Parity Check Option
Reserved
USB Data Length Option
USB Power Management
DMA Option
PCI Wait States
Reserved
Trap Option
A20gate Pass Through Option
Reserved
Release Number.............................. always reads 10h

0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Support Memory-Read-Line, Memory-Read-
Multiple, and Memory-Write-and-Invalidate ....
Only support Memory Read, Memory Write
Commands
Automatically disable babbled port when EOF
babble occurs..........................................default
Don’t disable babbled port
Disable PERR# generation.....................default
Enable parity check and PERR# generation
Support TD length up to 1280................default
Support TD length up to 1023
Disable USB power management...........default
Enable USB power management
16 DW burst access................................default
8 DW burst access
Zero wait ................................................default
One wait
Set trap 60/64 status bits without checking
enable bits ..............................................default
Set trap 60/64 status bits only when trap 60/64
enable bits are set.
Pass through A20GATE command sequence
defined in UHCI .....................................default
Don’t pass through Write I/O port 64 (ff)
.....................................................default
........................................ always reads 0
........................................ always reads 0
........................................ always reads 0
-35-
USB I/O Registers
These registers are compliant with the UHCI v1.1 standard.
Refer to the UHCI v1.1 specification for further details.
Offset 1-0 - USB Command
Offset 3-2 - USB Status
Offset 5-4 - USB Interrupt Enable
Offset 7-6 - Frame Number
Offset B-8 - Frame List Base Address
Offset 0C - Start Of Frame Modify
Offset 11-10 - Port 1 Status / Control
Offset 13-12 - Port 2 Status / Control
Register Descriptions
VT82C586A